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Searched refs:meminfo_t (Results 1 – 25 of 33) sorted by relevance

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/rk3399_ARM-atf/plat/common/
H A Dplat_bl1_common.c83 meminfo_t *bl1_tzram_layout; in bl1_plat_handle_post_image_load()
101 (meminfo_t *)bl1_tzram_layout->total_base); in bl1_plat_handle_post_image_load()
115 void bl1_plat_calc_bl2_layout(const meminfo_t *bl1_mem_layout, in bl1_plat_calc_bl2_layout()
116 meminfo_t *bl2_mem_layout) in bl1_plat_calc_bl2_layout()
129 flush_dcache_range((uintptr_t)bl2_mem_layout, sizeof(meminfo_t)); in bl1_plat_calc_bl2_layout()
/rk3399_ARM-atf/plat/hisilicon/poplar/
H A Dbl1_plat_setup.c29 static meminfo_t bl1_tzram_layout;
30 static meminfo_t bl2_tzram_layout;
59 flush_dcache_range((uintptr_t)&bl2_tzram_layout, sizeof(meminfo_t)); in bl1_plat_handle_post_image_load()
H A Dbl2_plat_setup.c27 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
/rk3399_ARM-atf/plat/marvell/armada/common/
H A Dmarvell_bl2_setup.c27 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
35 meminfo_t *bl2_plat_sec_mem_layout(void) in bl2_plat_sec_mem_layout()
46 void marvell_bl2_early_platform_setup(meminfo_t *mem_layout) in marvell_bl2_early_platform_setup()
H A Dmarvell_bl1_setup.c26 static meminfo_t bl1_ram_layout;
28 meminfo_t *bl1_plat_sec_mem_layout(void) in bl1_plat_sec_mem_layout()
/rk3399_ARM-atf/plat/brcm/common/
H A Dbrcm_bl2_setup.c22 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
48 meminfo_t *mem_layout) in bcm_bl2_early_platform_setup()
75 bcm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1); in bl2_early_platform_setup2()
/rk3399_ARM-atf/plat/rpi/rpi3/
H A Drpi3_bl2_setup.c28 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
66 meminfo_t *mem_layout = (meminfo_t *) arg1; in bl2_early_platform_setup2()
H A Drpi3_bl1_setup.c22 static meminfo_t bl1_tzram_layout;
24 meminfo_t *bl1_plat_sec_mem_layout(void) in bl1_plat_sec_mem_layout()
/rk3399_ARM-atf/plat/qemu/common/
H A Dqemu_bl1_setup.c41 static meminfo_t bl1_tzram_layout;
44 meminfo_t *bl1_plat_sec_mem_layout(void) in bl1_plat_sec_mem_layout()
H A Dqemu_bl2_setup.c54 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
60 meminfo_t *mem_layout = (void *)arg1; in bl2_early_platform_setup2()
/rk3399_ARM-atf/plat/hisilicon/hikey/
H A Dhikey_bl1_setup.c30 static meminfo_t bl1_tzram_layout;
40 meminfo_t *bl1_plat_sec_mem_layout(void) in bl1_plat_sec_mem_layout()
H A Dhikey_bl2_setup.c34 static meminfo_t bl2_el3_tzram_layout;
/rk3399_ARM-atf/plat/arm/common/
H A Darm_bl1_setup.c62 static meminfo_t bl1_tzram_layout;
323 sizeof(meminfo_t), NULL); in bl1_plat_handle_post_image_load()
327 (meminfo_t *)transfer_list_entry_data(te)); in bl1_plat_handle_post_image_load()
H A Darm_bl2_setup.c33 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
118 bl2_tzram_layout = *(meminfo_t *)transfer_list_entry_data(te); in arm_bl2_early_platform_setup()
124 bl2_tzram_layout = *(meminfo_t *)arg1; in arm_bl2_early_platform_setup()
H A Darm_bl2_el3_setup.c26 static meminfo_t bl2_el3_tzram_layout;
/rk3399_ARM-atf/plat/arm/css/common/
H A Dcss_bl2u_setup.c25 void bl2u_early_platform_setup(meminfo_t *mem_layout, void *plat_info) in bl2u_early_platform_setup()
/rk3399_ARM-atf/include/plat/marvell/armada/a3k/common/
H A Dplat_marvell.h64 void marvell_bl2_early_platform_setup(meminfo_t *mem_layout);
/rk3399_ARM-atf/plat/hisilicon/hikey960/
H A Dhikey960_bl1_setup.c43 static meminfo_t bl1_tzram_layout;
64 meminfo_t *bl1_plat_sec_mem_layout(void) in bl1_plat_sec_mem_layout()
/rk3399_ARM-atf/include/plat/marvell/armada/a8k/common/
H A Dplat_marvell.h80 void marvell_bl2_early_platform_setup(meminfo_t *mem_layout);
/rk3399_ARM-atf/include/plat/common/
H A Dplatform.h281 void bl1_plat_calc_bl2_layout(const meminfo_t *bl1_mem_layout,
282 meminfo_t *bl2_mem_layout);
/rk3399_ARM-atf/plat/arm/board/corstone700/common/include/
H A Dplatform_def.h92 #define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t))
/rk3399_ARM-atf/plat/arm/board/fvp_ve/include/
H A Dplatform_def.h187 #define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t))
/rk3399_ARM-atf/plat/arm/board/a5ds/include/
H A Dplatform_def.h202 #define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t))
/rk3399_ARM-atf/include/common/
H A Dbl_common.h174 } meminfo_t; typedef
/rk3399_ARM-atf/plat/arm/board/corstone1000/common/include/
H A Dplatform_def.h195 #define ARM_FW_CONFIG_BASE (ARM_SHARED_RAM_BASE + sizeof(meminfo_t))

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