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Searched refs:cpu_idx (Results 1 – 22 of 22) sorted by relevance

/rk3399_ARM-atf/lib/psci/
H A Dpsci_common.c181 unsigned int cpu_start_idx, ncpus, cpu_idx; in psci_is_last_cpu_to_idle_at_pwrlvl() local
196 for (cpu_idx = cpu_start_idx; cpu_idx < cpu_start_idx + ncpus; in psci_is_last_cpu_to_idle_at_pwrlvl()
197 cpu_idx++) { in psci_is_last_cpu_to_idle_at_pwrlvl()
198 local_state = psci_get_cpu_local_state_by_idx(cpu_idx); in psci_is_last_cpu_to_idle_at_pwrlvl()
199 if (cpu_idx == my_idx) { in psci_is_last_cpu_to_idle_at_pwrlvl()
220 for (unsigned int cpu_idx = 0U; cpu_idx < psci_plat_core_count; cpu_idx++) { in psci_is_last_on_cpu() local
221 if (cpu_idx == my_idx) { in psci_is_last_on_cpu()
226 if (psci_get_aff_info_state_by_idx(cpu_idx) != AFF_STATE_OFF) { in psci_is_last_on_cpu()
228 cpu_idx, my_idx, "running in the system"); in psci_is_last_on_cpu()
242 unsigned int cpu_idx; in psci_are_all_cpus_on() local
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H A Dpsci_private.h293 unsigned int cpu_idx,
296 void psci_restore_req_local_pwr_states(unsigned int cpu_idx,
299 void psci_get_target_local_pwr_states(unsigned int cpu_idx, unsigned int end_pwrlvl,
301 void psci_set_target_local_pwr_states(unsigned int cpu_idx, unsigned int end_pwrlvl,
305 void psci_get_parent_pwr_domain_nodes(unsigned int cpu_idx,
308 void psci_do_state_coordination(unsigned int cpu_idx, unsigned int end_pwrlvl,
311 int psci_validate_state_coordination(unsigned int cpu_idx, unsigned int end_pwrlvl,
322 void psci_set_pwr_domains_to_run(unsigned int cpu_idx, unsigned int end_pwrlvl);
334 void psci_cpu_on_finish(unsigned int cpu_idx, const psci_power_state_t *state_info);
345 void psci_cpu_suspend_to_powerdown_finish(unsigned int cpu_idx,
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H A Dpsci_on.c165 void psci_cpu_on_finish(unsigned int cpu_idx, const psci_power_state_t *state_info) in psci_cpu_on_finish() argument
193 gic_pcpu_init(cpu_idx); in psci_cpu_on_finish()
194 gic_cpuif_enable(cpu_idx); in psci_cpu_on_finish()
210 psci_spin_lock_cpu(cpu_idx); in psci_cpu_on_finish()
211 psci_spin_unlock_cpu(cpu_idx); in psci_cpu_on_finish()
228 PER_CPU_BY_INDEX(psci_cpu_pd_nodes, cpu_idx)->mpidr = read_mpidr() & MPIDR_AFFINITY_MASK; in psci_cpu_on_finish()
H A Dpsci_stat.c76 void psci_stats_update_pwr_down(unsigned int cpu_idx, unsigned int end_pwrlvl, in psci_stats_update_pwr_down() argument
84 parent_idx = PER_CPU_BY_INDEX(psci_cpu_pd_nodes, cpu_idx)->parent_node; in psci_stats_update_pwr_down()
96 last_cpu_in_non_cpu_pd[parent_idx] = (int)cpu_idx; in psci_stats_update_pwr_down()
108 void psci_stats_update_pwr_up(unsigned int cpu_idx, unsigned int end_pwrlvl, in psci_stats_update_pwr_up() argument
125 state_info, cpu_idx); in psci_stats_update_pwr_up()
128 psci_cpu_stat[cpu_idx][stat_idx].residency += residency; in psci_stats_update_pwr_up()
129 psci_cpu_stat[cpu_idx][stat_idx].count++; in psci_stats_update_pwr_up()
135 parent_idx = PER_CPU_BY_INDEX(psci_cpu_pd_nodes, cpu_idx)->parent_node; in psci_stats_update_pwr_up()
H A Dpsci_setup.c99 unsigned int cpu_idx; in psci_update_pwrlvl_limits() local
104 for (cpu_idx = 0; cpu_idx < psci_plat_core_count; cpu_idx++) { in psci_update_pwrlvl_limits()
105 psci_get_parent_pwr_domain_nodes(cpu_idx, in psci_update_pwrlvl_limits()
112 = cpu_idx; in psci_update_pwrlvl_limits()
215 unsigned int cpu_idx = plat_my_core_pos(); in psci_setup() local
235 PER_CPU_BY_INDEX(psci_cpu_pd_nodes, cpu_idx)->mpidr = in psci_setup()
244 psci_set_pwr_domains_to_run(cpu_idx, PLAT_MAX_PWR_LVL); in psci_setup()
H A Dpsci_main.c66 unsigned int cpu_idx = plat_my_core_pos(); in psci_cpu_suspend() local
141 psci_stats_update_pwr_up(cpu_idx, PSCI_CPU_PWR_LVL, &state_info); in psci_cpu_suspend()
152 entry_point_info_t *ep = get_cpu_data_by_index(cpu_idx, warmboot_ep_info); in psci_cpu_suspend()
166 rc = psci_cpu_suspend_start(cpu_idx, in psci_cpu_suspend()
179 unsigned int cpu_idx = plat_my_core_pos(); in psci_system_suspend() local
180 entry_point_info_t *ep = get_cpu_data_by_index(cpu_idx, warmboot_ep_info); in psci_system_suspend()
183 if (!psci_is_last_on_cpu(cpu_idx)) { in psci_system_suspend()
214 rc = psci_cpu_suspend_start(cpu_idx, in psci_system_suspend()
H A Dpsci_suspend.c297 void psci_cpu_suspend_to_powerdown_finish(unsigned int cpu_idx, unsigned int max_off_lvl, const psc… in psci_cpu_suspend_to_powerdown_finish() argument
322 gic_cpuif_enable(cpu_idx); in psci_cpu_suspend_to_powerdown_finish()
343 PUBLISH_EVENT_ARG(psci_suspend_pwrdown_finish, &cpu_idx); in psci_cpu_suspend_to_powerdown_finish()
/rk3399_ARM-atf/plat/mediatek/mt8183/drivers/mcdi/
H A Dmtk_mcdi.c38 void sspm_standbywfi_irq_enable(uint32_t cpu_idx) in sspm_standbywfi_irq_enable() argument
40 mmio_write_32(SSPM_CFGREG_ACAO_INT_SET, STANDBYWFI_EN(cpu_idx)); in sspm_standbywfi_irq_enable()
88 static uint32_t target_mask(int cluster, int cpu_idx, bool on) in target_mask() argument
96 if (cpu_idx >= 0) in target_mask()
97 t |= BIT(cpu_idx + CPU_ON_OFS); in target_mask()
102 if (cpu_idx >= 0) in target_mask()
103 t |= BIT(cpu_idx + CPU_OFF_OFS); in target_mask()
109 void mcdi_pause_clr(int cluster, int cpu_idx, bool on) in mcdi_pause_clr() argument
111 uint32_t tgt = target_mask(cluster, cpu_idx, on); in mcdi_pause_clr()
118 void mcdi_pause_set(int cluster, int cpu_idx, bool on) in mcdi_pause_set() argument
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H A Dmtk_mcdi.h13 void sspm_standbywfi_irq_enable(uint32_t cpu_idx);
25 void mcdi_pause_set(int cluster, int cpu_idx, bool on);
26 void mcdi_pause_clr(int cluster, int cpu_idx, bool on);
27 void mcdi_hotplug_set(int cluster, int cpu_idx, bool on);
28 void mcdi_hotplug_clr(int cluster, int cpu_idx, bool on);
29 void mcdi_hotplug_wait_ack(int cluster, int cpu_idx, bool on);
/rk3399_ARM-atf/include/drivers/arm/
H A Dgic.h10 void gic_init(unsigned int cpu_idx);
11 void gic_cpuif_enable(unsigned int cpu_idx);
12 void gic_cpuif_disable(unsigned int cpu_idx);
13 void gic_pcpu_off(unsigned int cpu_idx);
14 void gic_pcpu_init(unsigned int cpu_idx);
/rk3399_ARM-atf/drivers/arm/gic/v3/
H A Dgicv3_base.c103 void __init gic_init(unsigned int cpu_idx) in gic_init() argument
112 void gic_cpuif_enable(unsigned int cpu_idx) in gic_cpuif_enable() argument
114 gicv3_cpuif_enable(cpu_idx); in gic_cpuif_enable()
120 void gic_cpuif_disable(unsigned int cpu_idx) in gic_cpuif_disable() argument
122 gicv3_cpuif_disable(cpu_idx); in gic_cpuif_disable()
130 void gic_pcpu_init(unsigned int cpu_idx) in gic_pcpu_init() argument
152 gicv3_rdistif_init(cpu_idx); in gic_pcpu_init()
158 void gic_pcpu_off(unsigned int cpu_idx) in gic_pcpu_off() argument
160 gicv3_rdistif_off(cpu_idx); in gic_pcpu_off()
/rk3399_ARM-atf/drivers/arm/gicv5/
H A Dgicv5_cpuif.c10 void gic_cpuif_enable(unsigned int cpu_idx) in gic_cpuif_enable() argument
14 void gic_cpuif_disable(unsigned int cpu_idx) in gic_cpuif_disable() argument
18 void gic_pcpu_init(unsigned int cpu_idx) in gic_pcpu_init() argument
23 void gic_pcpu_off(unsigned int cpu_idx) in gic_pcpu_off() argument
H A Dgicv5_iri.c15 void __init gic_init(unsigned int cpu_idx) in gic_init() argument
/rk3399_ARM-atf/drivers/arm/gic/v2/
H A Dgicv2_base.c41 void __init gic_init(unsigned int cpu_idx) in gic_init() argument
50 void gic_cpuif_enable(unsigned int cpu_idx) in gic_cpuif_enable() argument
58 void gic_cpuif_disable(unsigned int cpu_idx) in gic_cpuif_disable() argument
66 void gic_pcpu_init(unsigned int cpu_idx) in gic_pcpu_init() argument
76 void gic_pcpu_off(unsigned int cpu_idx) in gic_pcpu_off() argument
/rk3399_ARM-atf/bl31/
H A Dbl31_context_mgmt.c45 void *cm_get_context_by_index(unsigned int cpu_idx, in cm_get_context_by_index() argument
50 return get_cpu_data_by_index(cpu_idx, in cm_get_context_by_index()
58 void cm_set_context_by_index(unsigned int cpu_idx, void *context, in cm_set_context_by_index() argument
63 set_cpu_data_by_index(cpu_idx, in cm_set_context_by_index()
/rk3399_ARM-atf/include/lib/el3_runtime/
H A Dcontext_mgmt.h25 void *cm_get_context_by_index(unsigned int cpu_idx,
27 void cm_set_context_by_index(unsigned int cpu_idx,
90 static inline void cm_manage_extensions_el3(unsigned int cpu_idx) {} in cm_manage_extensions_el3() argument
/rk3399_ARM-atf/bl32/sp_min/
H A Dsp_min_main.c92 void *cm_get_context_by_index(unsigned int cpu_idx, in cm_get_context_by_index() argument
96 return sp_min_cpu_ctx_ptr[cpu_idx]; in cm_get_context_by_index()
103 void cm_set_context_by_index(unsigned int cpu_idx, void *context, in cm_set_context_by_index() argument
107 sp_min_cpu_ctx_ptr[cpu_idx] = context; in cm_set_context_by_index()
/rk3399_ARM-atf/plat/imx/imx8m/imx8mq/
H A Dgpc.c183 static void imx_gpc_set_affinity(uint32_t hwirq, unsigned int cpu_idx) in imx_gpc_set_affinity() argument
188 if (hwirq >= MAX_HW_IRQ_NUM || cpu_idx >= 4) { in imx_gpc_set_affinity()
196 gpc_imr_core_spin_lock(cpu_idx); in imx_gpc_set_affinity()
197 reg = gpc_imr_offset[cpu_idx] + (hwirq / 32) * 4; in imx_gpc_set_affinity()
201 gpc_imr_core_spin_unlock(cpu_idx); in imx_gpc_set_affinity()
205 if (cpu_idx != i) { in imx_gpc_set_affinity()
/rk3399_ARM-atf/plat/imx/common/
H A Dplat_imx8_gic.c100 void gic_cpuif_enable(unsigned int cpu_idx) in gic_cpuif_enable() argument
112 void gic_cpuif_disable(unsigned int cpu_idx) in gic_cpuif_disable() argument
/rk3399_ARM-atf/drivers/arm/css/scp/
H A Dcss_pm_scmi.c269 unsigned int channel_id, cpu_idx, domain_id; in css_scp_get_power_state() local
279 cpu_idx = (unsigned int)plat_core_pos_by_mpidr(mpidr); in css_scp_get_power_state()
280 assert(cpu_idx < PLATFORM_CORE_COUNT); in css_scp_get_power_state()
282 css_scp_core_pos_to_scmi_channel(cpu_idx, &domain_id, &channel_id); in css_scp_get_power_state()
/rk3399_ARM-atf/include/lib/psci/
H A Dpsci_lib.h88 void psci_warmboot_entrypoint(unsigned int cpu_idx);
/rk3399_ARM-atf/docs/
H A Dchange-log.md10905 - Unify type of "cpu_idx" and Platform specific defines across PSCI module.
11206 - Unify type of "cpu_idx" across PSCI module.