xref: /rk3399_ARM-atf/plat/mediatek/mt8183/drivers/mcdi/mtk_mcdi.h (revision 3ea2cc00fc0fdeef0e84a80202964609479349cd)
1*539061b8Skenny liang /*
2*539061b8Skenny liang  * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
3*539061b8Skenny liang  *
4*539061b8Skenny liang  * SPDX-License-Identifier: BSD-3-Clause
5*539061b8Skenny liang  */
6*539061b8Skenny liang 
7*539061b8Skenny liang #ifndef __MTK_MCDI_H__
8*539061b8Skenny liang #define __MTK_MCDI_H__
9*539061b8Skenny liang 
10*539061b8Skenny liang #include <stdbool.h>
11*539061b8Skenny liang 
12*539061b8Skenny liang void sspm_set_bootaddr(uint32_t bootaddr);
13*539061b8Skenny liang void sspm_standbywfi_irq_enable(uint32_t cpu_idx);
14*539061b8Skenny liang void sspm_cluster_pwr_off_notify(uint32_t cluster);
15*539061b8Skenny liang void sspm_cluster_pwr_on_notify(uint32_t cluster);
16*539061b8Skenny liang 
17*539061b8Skenny liang uint32_t mcdi_avail_cpu_mask_read(void);
18*539061b8Skenny liang uint32_t mcdi_avail_cpu_mask_write(uint32_t mask);
19*539061b8Skenny liang uint32_t mcdi_avail_cpu_mask_set(uint32_t mask);
20*539061b8Skenny liang uint32_t mcdi_avail_cpu_mask_clr(uint32_t mask);
21*539061b8Skenny liang uint32_t mcdi_cpu_cluster_pwr_stat_read(void);
22*539061b8Skenny liang 
23*539061b8Skenny liang void mcdi_pause(void);
24*539061b8Skenny liang void mcdi_unpause(void);
25*539061b8Skenny liang void mcdi_pause_set(int cluster, int cpu_idx, bool on);
26*539061b8Skenny liang void mcdi_pause_clr(int cluster, int cpu_idx, bool on);
27*539061b8Skenny liang void mcdi_hotplug_set(int cluster, int cpu_idx, bool on);
28*539061b8Skenny liang void mcdi_hotplug_clr(int cluster, int cpu_idx, bool on);
29*539061b8Skenny liang void mcdi_hotplug_wait_ack(int cluster, int cpu_idx, bool on);
30*539061b8Skenny liang 
31*539061b8Skenny liang bool check_mcdi_ctl_stat(void);
32*539061b8Skenny liang void mcdi_init(void);
33*539061b8Skenny liang 
34*539061b8Skenny liang #endif /* __MTK_MCDI_H__ */
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