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Searched refs:STM32MP_DDR_BASE (Results 1 – 14 of 14) sorted by relevance

/rk3399_ARM-atf/drivers/st/ddr/
H A Dstm32mp_ddr_test.c46 u_register_t saved_value = mmio_read_pattern(STM32MP_DDR_BASE); in stm32mp_ddr_test_rw_access()
48 mmio_write_pattern(STM32MP_DDR_BASE, DDR_PATTERN); in stm32mp_ddr_test_rw_access()
50 if (mmio_read_pattern(STM32MP_DDR_BASE) != DDR_PATTERN) { in stm32mp_ddr_test_rw_access()
51 return STM32MP_DDR_BASE; in stm32mp_ddr_test_rw_access()
54 mmio_write_pattern(STM32MP_DDR_BASE, saved_value); in stm32mp_ddr_test_rw_access()
72 mmio_write_pattern(STM32MP_DDR_BASE, pattern); in stm32mp_ddr_test_data_bus()
74 if (mmio_read_pattern(STM32MP_DDR_BASE) != pattern) { in stm32mp_ddr_test_data_bus()
75 return STM32MP_DDR_BASE; in stm32mp_ddr_test_data_bus()
100 mmio_write_pattern(STM32MP_DDR_BASE + offset, DDR_PATTERN); in stm32mp_ddr_test_addr_bus()
104 mmio_write_pattern(STM32MP_DDR_BASE + testoffset, DDR_ANTIPATTERN); in stm32mp_ddr_test_addr_bus()
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H A Dstm32mp1_ram.c150 priv->info.base = STM32MP_DDR_BASE; in stm32mp1_ddr_probe()
H A Dstm32mp2_ram.c203 priv->info.base = STM32MP_DDR_BASE; in stm32mp2_ddr_probe()
/rk3399_ARM-atf/drivers/st/mce/
H A Dstm32_mce.c116 if ((config->start_address < STM32MP_DDR_BASE) || in check_region_settings()
117 (config->end_address < STM32MP_DDR_BASE)) { in check_region_settings()
122 end = STM32MP_DDR_BASE + dt_get_ddr_size() - 1U; in check_region_settings()
314 if ((address < STM32MP_DDR_BASE) || in stm32_mce_get_address_encryption_state()
315 (address > (STM32MP_DDR_BASE + dt_get_ddr_size() - 1U)) || in stm32_mce_get_address_encryption_state()
336 (STM32MP_DDR_BASE & DDR_BASE_EXTRA_MASK); in stm32_mce_get_address_encryption_state()
339 (STM32MP_DDR_BASE & DDR_BASE_EXTRA_MASK); in stm32_mce_get_address_encryption_state()
/rk3399_ARM-atf/fdts/
H A Dstm32mp13-fw-config.dtsi15 #define DDR_NS_BASE STM32MP_DDR_BASE
17 #define DDR_SEC_BASE (STM32MP_DDR_BASE + (DDR_SIZE - DDR_SEC_SIZE))
H A Dstm32mp15-fw-config.dtsi15 #define DDR_NS_BASE STM32MP_DDR_BASE
19 #define DDR_SEC_BASE (STM32MP_DDR_BASE + (DDR_SIZE - DDR_SEC_SIZE))
/rk3399_ARM-atf/plat/st/stm32mp2/
H A Dstm32mp2_pm.c84 if (entrypoint < STM32MP_DDR_BASE) { in stm32_validate_ns_entrypoint()
H A Dbl2_plat_setup.c105 ret = mmap_add_dynamic_region(STM32MP_DDR_BASE, STM32MP_DDR_BASE, in bl2_platform_setup()
H A Dstm32mp2_def.h113 #define STM32MP_DDR_BASE U(0x80000000) macro
197 #define STM32MP_BL33_BASE (STM32MP_DDR_BASE + U(0x04000000))
H A Dstm32mp2_private.c439 return (uintptr_t)STM32MP_DDR_BASE; in stm32_risaf_get_memory_base()
/rk3399_ARM-atf/plat/st/common/
H A Dstm32mp_common.c131 return mmap_add_dynamic_region(STM32MP_DDR_BASE, STM32MP_DDR_BASE, in stm32mp_map_ddr_non_cacheable()
138 return mmap_remove_dynamic_region(STM32MP_DDR_BASE, in stm32mp_unmap_ddr()
/rk3399_ARM-atf/plat/st/stm32mp1/
H A Dbl2_plat_setup.c162 ret = mmap_add_dynamic_region(STM32MP_DDR_BASE, STM32MP_DDR_BASE, in bl2_platform_setup()
471 paged_mem_params->image_info.image_base = STM32MP_DDR_BASE + in bl2_plat_handle_post_image_load()
H A Dstm32mp1_def.h124 #define STM32MP_DDR_BASE U(0xC0000000) macro
183 #define STM32MP_BL33_BASE STM32MP_DDR_BASE
186 #define STM32MP_BL33_BASE (STM32MP_DDR_BASE + U(0x100000))
H A Dstm32mp1_pm.c180 if (entrypoint < STM32MP_DDR_BASE) { in stm32_validate_ns_entrypoint()