Merge changes Ib220a866,I38e6af65,I1554efdb,Iae99985e,I96f96267, ... into integration

* changes:
feat(stm32mp25-fdts): enable rng nodes for ST boards
feat(stm32mp2): prepare DDR secure area encr

Merge changes Ib220a866,I38e6af65,I1554efdb,Iae99985e,I96f96267, ... into integration

* changes:
feat(stm32mp25-fdts): enable rng nodes for ST boards
feat(stm32mp2): prepare DDR secure area encryption
feat(stm32mp2): add some platform helpers
feat(st-drivers): add RISAF driver
feat(fdts): add RISAF nodes for STM32MP25
feat(stm32mp2-fdts): add memory firewall node
feat(stm32mp2-fdts): add firewall nodes in fw-config
feat(stm32mp2): add RIF dt-binding defines
feat(stm32mp1-fdts): add MCE support for STM32MP13 DK board
feat(stm32mp1): prepare DDR secure area encryption for STM32MP13
feat(stm32mp1): enable MCE driver for STM32MP13
feat(st-drivers): add Memory Cipher Engine driver
feat(dt-bindings): add MCE DT bindings for STM32MP13
fix(st-crypto): improve RNG health test configuration
feat(st): add RNG minor version
feat(st-crypto): add multi instance and error management in RNG driver
feat(stm32mp2): add HASH and RNG compilation
feat(stm32mp25-fdts): add RNG node

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feat(stm32mp1): enable MCE driver for STM32MP13

Enabled as BL2 sources.
Add MCE base address and key size in platform definitions.

Change-Id: Icb7d9d7a56806a86e6d0a76640a375a5b5e88a2a
Signed-off-by

feat(stm32mp1): enable MCE driver for STM32MP13

Enabled as BL2 sources.
Add MCE base address and key size in platform definitions.

Change-Id: Icb7d9d7a56806a86e6d0a76640a375a5b5e88a2a
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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Merge changes from topic "st_gpio_update" into integration

* changes:
fix(st-gpio): configure each GPIO mux as secure for STM32MP2
feat(st-gpio): add set GPIO config API
fix(stm32mp1): remove

Merge changes from topic "st_gpio_update" into integration

* changes:
fix(st-gpio): configure each GPIO mux as secure for STM32MP2
feat(st-gpio): add set GPIO config API
fix(stm32mp1): remove unnecessary assert on GPIO_BANK_A value
refactor(st): use GPIO banks definition from bindings
feat(dt-bindings): describe ST GPIO banks and config

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refactor(st): use GPIO banks definition from bindings

Use GPIO banks definition from bindings.

Change-Id: I4dcf321345e319af78285e940b72a1369569b996
Signed-off-by: Pascal Paillet <p.paillet@st.com>

Merge changes from topic "st_clk_update" into integration

* changes:
feat(st-clock): use early traces
fix(st-clock): adapt order of CSS on LSE and HSE
refactor(st-clock): remove unused struct

Merge changes from topic "st_clk_update" into integration

* changes:
feat(st-clock): use early traces
fix(st-clock): adapt order of CSS on LSE and HSE
refactor(st-clock): remove unused struct
feat(stm32mp1-fdts): remove RTC clock configuration
refactor(st-clock): move stm32mp1_clk_rcc_regs_*lock
refactor(st-clock): driver size optimization
refactor(st-clock): remove BL32 support on STM32MP13
feat(st-clock): don't gate/ungate an oscillator if it is not wired
feat(dt-bindings): add missing SPIx bus clocks
feat(stm32mp1-fdts): remove PLL1 settings
feat(st-clock): update with new bindings
feat(stm32mp1-fdts): new RCC DT bindings for STM32MP1
feat(dt-bindings): new RCC DT bindings
feat(stm32mp1): always boot at 650MHz
refactor(st-clock): remove LSEDRV_MEDIUM_HIGH for STM32MP13
fix(st-clock): display proper PLL number for STM32MP13
fix(st-clock): do not reconfigure LSE
feat(stm32mp1-fdts): move RNG1 to CSI to improve random generation
refactor(st-clock): remove unused clk function in API
refactor(st-clock): support deactivated STGEN in stm32mp_stgen_config
feat(st-clock): add function to restore generic timer rate

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feat(stm32mp1): always boot at 650MHz

Switching to higher CPU frequencies requires a dedicated chip version
(STM32MP1xxD or STM32MP1xxF), and increase CPU voltage. To avoid
re-configuring I2C and PM

feat(stm32mp1): always boot at 650MHz

Switching to higher CPU frequencies requires a dedicated chip version
(STM32MP1xxD or STM32MP1xxF), and increase CPU voltage. To avoid
re-configuring I2C and PMIC before and after applying clock tree,
always boot at 650MHz, which is the frequency for nominal voltage.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Id05a3ee17e7dd57e2d64dc06f8f1e7f9cb21e110

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Merge changes from topic "stm32mp2-usb" into integration

* changes:
feat(stm32mp2): add STM32MP_USB_PROGRAMMER compilation
refactor(st): move macros to common folder
refactor(stm32mp1): remove

Merge changes from topic "stm32mp2-usb" into integration

* changes:
feat(stm32mp2): add STM32MP_USB_PROGRAMMER compilation
refactor(st): move macros to common folder
refactor(stm32mp1): remove unused macros
fix(usb): add missing include

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refactor(st): move macros to common folder

As these definitions will be the same for STM32MP1 and STM32MP2, move
PLATFORM_MTD_MAX_PAGE_SIZE and DWL_BUFFER_SIZE macro definition to the
file: plat/st/

refactor(st): move macros to common folder

As these definitions will be the same for STM32MP1 and STM32MP2, move
PLATFORM_MTD_MAX_PAGE_SIZE and DWL_BUFFER_SIZE macro definition to the
file: plat/st/common/include/stm32mp_common.h

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I480669d009d15fec753298f47b136e34fa240132

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Merge changes from topic "st-bsec-otp" into integration

* changes:
feat(stm32mp2-fdts): add board ID OTP in STM32MP257F-EV1
feat(stm32mp2-fdts): add OTP nodes in STM32MP251 SoC DT file
fix(stm

Merge changes from topic "st-bsec-otp" into integration

* changes:
feat(stm32mp2-fdts): add board ID OTP in STM32MP257F-EV1
feat(stm32mp2-fdts): add OTP nodes in STM32MP251 SoC DT file
fix(stm32mp2): add missing include
feat(st): do not directly call BSEC functions in common code
feat(st): use stm32_get_otp_value_from_idx() in BL31
refactor(st): update test for closed chip
refactor(st-bsec): improve BSEC driver
refactor(st): use dashes for BSEC node names

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refactor(st): use dashes for BSEC node names

This is something commonly asked by Linux kernel DT maintainers [1].
The mentioned doc is not upstreamed, but may be checked with dtbs_check.
While at it

refactor(st): use dashes for BSEC node names

This is something commonly asked by Linux kernel DT maintainers [1].
The mentioned doc is not upstreamed, but may be checked with dtbs_check.
While at it align some nodes with Linux or OP-TEE.

[1] https://lore.kernel.org/linux-arm-kernel/20231125184422.12315-1-krzysztof.kozlowski@linaro.org/

Change-Id: I63e983c2a00eda3cd8b81c66c0cd1a97cf8249b7
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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Merge "feat(st): update STM32MP DT files" into integration

feat(st): update STM32MP DT files

This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, a

feat(st): update STM32MP DT files

This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, as already in
pinctrl files.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iab94b0ba7a4a0288ca53d1ae57ab590566967415

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Merge changes from topic "stm32mp2" into integration

* changes:
feat(stm32mp2): generate stm32 file
feat(stm32mp2-fdts): add stm32mp257f-ev1 board
feat(stm32mp2-fdts): introduce stm32mp25 pinc

Merge changes from topic "stm32mp2" into integration

* changes:
feat(stm32mp2): generate stm32 file
feat(stm32mp2-fdts): add stm32mp257f-ev1 board
feat(stm32mp2-fdts): introduce stm32mp25 pinctrl files
feat(stm32mp2-fdts): introduce stm32mp25 SoCs family
feat(stm32mp2): add console configuration
feat(st): add RCC registers list
feat(st-uart): add AARCH64 stm32_console driver
feat(st): introduce new platform STM32MP2
feat(dt-bindings): add the STM32MP2 clock and reset bindings
docs(changelog): add scopes for STM32MP2
feat(docs): introduce STM32MP2 doc
refactor(docs): add a sub-menu for ST platforms
refactor(st): move plat_image_load.c
refactor(st): rename PLAT_NB_FIXED_REGS
refactor(st): move some storage definitions to common part
refactor(st): move SDMMC definitions to driver
feat(st-clock): stub fdt_get_rcc_secure_state
feat(st-clock): allow aarch64 compilation of STGEN functions
feat(st): allow AARCH64 compilation for common code
refactor(st): rename QSPI macros

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refactor(st): rename PLAT_NB_FIXED_REGS

Rename PLAT_NB_FIXED_REGS to PLAT_NB_FIXED_REGUS.
This avoids confusion with regulators and registers.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Chang

refactor(st): rename PLAT_NB_FIXED_REGS

Rename PLAT_NB_FIXED_REGS to PLAT_NB_FIXED_REGUS.
This avoids confusion with regulators and registers.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Change-Id: Idb2de7204fe978ffcdd729e6cbe453e85fd089b5

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refactor(st): move some storage definitions to common part

Those storage macros are common to all STM32MPU chips, move them to
plat/st/common/include/stm32mp_io_storage.h

Signed-off-by: Yann Gautie

refactor(st): move some storage definitions to common part

Those storage macros are common to all STM32MPU chips, move them to
plat/st/common/include/stm32mp_io_storage.h

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Id20ec00ba65edf9ec7a3a89adfda307c954c3cb6

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refactor(st): move SDMMC definitions to driver

Those specific SDMMC definitions are only used in stm32_sdmmc2.c driver.
Move them there.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Chang

refactor(st): move SDMMC definitions to driver

Those specific SDMMC definitions are only used in stm32_sdmmc2.c driver.
Move them there.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Iac7e505e9421aa7630bee8ce6fc2277b98581995

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Merge changes from topic "st-fixes" into integration

* changes:
fix(spi-nand): add Quad Enable management
fix(st-clock): disabling CKPER clock is not functional on stm32mp13
fix(st-uart): skip

Merge changes from topic "st-fixes" into integration

* changes:
fix(spi-nand): add Quad Enable management
fix(st-clock): disabling CKPER clock is not functional on stm32mp13
fix(st-uart): skip console flush if UART is disabled
fix(st): flush UART at the end of uart_read()
fix(stm32mp1): use the BSEC nodes compatible for stm32mp13
fix(stm32mp13-fdts): correct the BSEC nodes compatible
fix(stm32mp1-fdts): move /omit-if-no-ref/ to overlay files
fix(stm32mp1): properly check PSCI functions return

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fix(stm32mp1): use the BSEC nodes compatible for stm32mp13

Device tree alignment with kernel and latest binding for BSEC node:
the rev2.0 is used on STM32MP13x devices with the new compatible
compat

fix(stm32mp1): use the BSEC nodes compatible for stm32mp13

Device tree alignment with kernel and latest binding for BSEC node:
the rev2.0 is used on STM32MP13x devices with the new compatible
compatible = "st,stm32mp13-bsec".

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I76f86f2951eff4af91d22dfb926969fd842a36ce

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Merge changes from topic "refactor_st_common" into integration

* changes:
refactor(st): move board info in common code
refactor(st): move GIC code to common directory
refactor(st): move boot b

Merge changes from topic "refactor_st_common" into integration

* changes:
refactor(st): move board info in common code
refactor(st): move GIC code to common directory
refactor(st): move boot backup register management

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refactor(st): move boot backup register management

This backup register used to pass boot information to BL33, has the
same mapping for ST platforms. Its management can then be moved to
common direc

refactor(st): move boot backup register management

This backup register used to pass boot information to BL33, has the
same mapping for ST platforms. Its management can then be moved to
common directory.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ic873f099c1f87c6ba2825b4946365ae6a9687798

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Merge "refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE" into integration

refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE

The code managing legacy boot (without FIP) that was under
STM32MP_USE_STM32IMAGE flag is remove.

Change-Id: I04452453ed84567b0de39e900594a81526562

refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE

The code managing legacy boot (without FIP) that was under
STM32MP_USE_STM32IMAGE flag is remove.

Change-Id: I04452453ed84567b0de39e900594a81526562259
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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Merge changes from topic "stm32mp1-trusted-boot" into integration

* changes:
docs(st): update documentation for TRUSTED_BOARD_BOOT
fix(build): ensure that the correct rule is called for tools

Merge changes from topic "stm32mp1-trusted-boot" into integration

* changes:
docs(st): update documentation for TRUSTED_BOARD_BOOT
fix(build): ensure that the correct rule is called for tools
feat(stm32mp1): add the platform specific build for tools
fix(stm32mp13-fdts): remove secure status
feat(stm32mp1-fdts): add CoT and fuse references for authentication
feat(stm32mp1): add a check on TRUSTED_BOARD_BOOT with secure chip
feat(stm32mp1): add the decryption support
feat(stm32mp1): add the TRUSTED_BOARD_BOOT support
feat(stm32mp1): update ROM code API for header v2 management
feat(stm32mp1): remove unused function from boot API
refactor(stm32mp1): remove authentication using STM32 image mode
fix(fconf): fix type error displaying disable_auth
feat(tbbr): increase PK_DER_LEN size
fix(auth): correct sign-compare warning
feat(auth): allow to verify PublicKey with platform format PK
feat(cert-create): update for ECDSA brainpoolP256r/t1 support
feat(stm32mp1): add RNG initialization in BL2 for STM32MP13
feat(st-crypto): remove BL32 HASH driver usage
feat(stm32mp1): add a stm32mp crypto library
feat(st-crypto): add STM32 RNG driver
feat(st-crypto): add AES decrypt/auth by SAES IP
feat(st-crypto): add ECDSA signature check with PKA
feat(st-crypto): update HASH for new hardware version used in STM32MP13

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feat(stm32mp1): add the decryption support

Add the decryption support for STM32MP1 binaries.
Decryption is limited to the BL32 loaded images.

Limitation: STM32MP15 doesn't support the feature.

Cha

feat(stm32mp1): add the decryption support

Add the decryption support for STM32MP1 binaries.
Decryption is limited to the BL32 loaded images.

Limitation: STM32MP15 doesn't support the feature.

Change-Id: I96800bac7b22109f8471eb2953fc0dc269fc4fd1
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>

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feat(stm32mp1): add the TRUSTED_BOARD_BOOT support

Add the support of the TRUSTED_BOARD_BOOT to authenticate the loaded
FIP using platform CoT management.
It adds TBB platform definition, redefining

feat(stm32mp1): add the TRUSTED_BOARD_BOOT support

Add the support of the TRUSTED_BOARD_BOOT to authenticate the loaded
FIP using platform CoT management.
It adds TBB platform definition, redefining the standard image ID in
order to decrease requested size in BL2 binary.
Authentication will use mbedTLS library for parsing certificate
configured with a platform configuration.

Change-Id: I9da66b915c5e9e9293fccfce92bef2434da1e430
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>

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