46 	u_register_t saved_value = mmio_read_pattern(STM32MP_DDR_BASE);  in stm32mp_ddr_test_rw_access()
48 	mmio_write_pattern(STM32MP_DDR_BASE, DDR_PATTERN);  in stm32mp_ddr_test_rw_access()
50 	if (mmio_read_pattern(STM32MP_DDR_BASE) != DDR_PATTERN) {  in stm32mp_ddr_test_rw_access()
51 		return STM32MP_DDR_BASE;  in stm32mp_ddr_test_rw_access()
54 	mmio_write_pattern(STM32MP_DDR_BASE, saved_value);  in stm32mp_ddr_test_rw_access()
72 		mmio_write_pattern(STM32MP_DDR_BASE, pattern);  in stm32mp_ddr_test_data_bus()
74 		if (mmio_read_pattern(STM32MP_DDR_BASE) != pattern) {  in stm32mp_ddr_test_data_bus()
75 			return STM32MP_DDR_BASE;  in stm32mp_ddr_test_data_bus()
100 		mmio_write_pattern(STM32MP_DDR_BASE + offset, DDR_PATTERN);  in stm32mp_ddr_test_addr_bus()
104 	mmio_write_pattern(STM32MP_DDR_BASE + testoffset, DDR_ANTIPATTERN);  in stm32mp_ddr_test_addr_bus()
108 		if (mmio_read_pattern(STM32MP_DDR_BASE + offset) != DDR_PATTERN) {  in stm32mp_ddr_test_addr_bus()
109 			return STM32MP_DDR_BASE + offset;  in stm32mp_ddr_test_addr_bus()
113 	mmio_write_pattern(STM32MP_DDR_BASE + testoffset, DDR_PATTERN);  in stm32mp_ddr_test_addr_bus()
118 		mmio_write_pattern(STM32MP_DDR_BASE + testoffset, DDR_ANTIPATTERN);  in stm32mp_ddr_test_addr_bus()
120 		if (mmio_read_pattern(STM32MP_DDR_BASE) != DDR_PATTERN) {  in stm32mp_ddr_test_addr_bus()
121 			return STM32MP_DDR_BASE;  in stm32mp_ddr_test_addr_bus()
126 			if ((mmio_read_pattern(STM32MP_DDR_BASE + offset) != DDR_PATTERN) &&  in stm32mp_ddr_test_addr_bus()
128 				return STM32MP_DDR_BASE + offset;  in stm32mp_ddr_test_addr_bus()
132 		mmio_write_pattern(STM32MP_DDR_BASE + testoffset, DDR_PATTERN);  in stm32mp_ddr_test_addr_bus()
149 	mmio_write_pattern(STM32MP_DDR_BASE, DDR_PATTERN);  in stm32mp_ddr_check_size()
152 		mmio_write_pattern(STM32MP_DDR_BASE + offset, DDR_ANTIPATTERN);  in stm32mp_ddr_check_size()
155 		if (mmio_read_pattern(STM32MP_DDR_BASE) != DDR_PATTERN) {  in stm32mp_ddr_check_size()