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Searched refs:RCAR_CNTC_BASE (Results 1 – 9 of 9) sorted by relevance

/rk3399_ARM-atf/drivers/renesas/common/timer/
H A Dtimer.c27 mmio_read_32((uintptr_t)(RCAR_CNTC_BASE + CNTFID_OFF)); in rcar_pwrc_save_timer_state()
33 mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + CNTCR_OFF), 0U); in rcar_pwrc_restore_timer_state()
36 mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTCVL_OFF), in rcar_pwrc_restore_timer_state()
39 mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTCVU_OFF), in rcar_pwrc_restore_timer_state()
42 mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + CNTFID_OFF), in rcar_pwrc_restore_timer_state()
48 mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + CNTCR_OFF), in rcar_pwrc_restore_timer_state()
/rk3399_ARM-atf/plat/renesas/rcar_gen5/include/
H A Drcar_def.h83 #define RCAR_CNTC_BASE UL(0x1C000000) macro
95 #define ARM_SYS_CNTCTL_BASE RCAR_CNTC_BASE
/rk3399_ARM-atf/plat/renesas/rcar_gen4/include/
H A Drcar_def.h83 #define RCAR_CNTC_BASE UL(0xE6080000) macro
118 #define ARM_SYS_CNTCTL_BASE RCAR_CNTC_BASE
/rk3399_ARM-atf/plat/renesas/rcar_gen4/
H A Dbl31_plat_setup.c77 mmio_write_32(RCAR_CNTC_BASE + CNTCR_OFF, CNTCR_FCREQ(0) | CNTCR_EN); in bl31_platform_setup()
/rk3399_ARM-atf/plat/renesas/common/
H A Dbl31_plat_setup.c114 mmio_write_32(RCAR_CNTC_BASE + CNTCR_OFF, CNTCR_FCREQ(U(0)) | CNTCR_EN); in bl31_platform_setup()
/rk3399_ARM-atf/plat/renesas/rcar_gen5/
H A Dbl31_plat_setup.c165 mmio_write_32(RCAR_CNTC_BASE + CNTCR_OFF, CNTCR_FCREQ(0) | CNTCR_EN); in bl31_platform_setup()
/rk3399_ARM-atf/plat/renesas/common/include/
H A Drcar_def.h121 #define RCAR_CNTC_BASE U(0xE6080000) macro
206 #define ARM_SYS_CNTCTL_BASE RCAR_CNTC_BASE
/rk3399_ARM-atf/plat/renesas/rzg/
H A Dbl2_plat_setup.c1018 mmio_setbits_32(RCAR_CNTC_BASE + (uintptr_t)CNTCR_OFF, in bl2_init_generic_timer()
/rk3399_ARM-atf/plat/renesas/rcar/
H A Dbl2_plat_setup.c1416 mmio_setbits_32(RCAR_CNTC_BASE + (uintptr_t)CNTCR_OFF, in bl2_init_generic_timer()