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Searched refs:FPGA2SOC_MASK (Results 1 – 5 of 5) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/stratix10/
H A Dbl2_plat_setup.c85 FPGA2SOC_MASK | F2SDRAM0_MASK | F2SDRAM1_MASK | in bl2_el3_early_platform_setup()
/rk3399_ARM-atf/plat/intel/soc/common/include/
H A Dsocfpga_reset_manager.h22 #define FPGA2SOC_MASK (1<<2) macro
/rk3399_ARM-atf/plat/intel/soc/agilex/
H A Dbl2_plat_setup.c90 FPGA2SOC_MASK); in bl2_el3_early_platform_setup()
/rk3399_ARM-atf/plat/intel/soc/agilex5/
H A Dbl2_plat_setup.c160 FPGA2SOC_MASK | F2SDRAM0_MASK); in bl2_el3_early_platform_setup()
/rk3399_ARM-atf/plat/intel/soc/common/soc/
H A Dsocfpga_reset_manager.c167 if ((mask & FPGA2SOC_MASK) != 0U) { in socfpga_f2s_bridge_mask()
198 if (mask & FPGA2SOC_MASK) { in socfpga_f2s_bridge_mask()
231 if ((mask & FPGA2SOC_MASK) != 0U) { in socfpga_f2s_bridge_mask()