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Searched refs:DRM_BASE (Results 1 – 5 of 5) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/drivers/dfd/mt8188/
H A Dplat_dfd.h19 #define MTK_DRM_LATCH_CTL1 (DRM_BASE + 0x40)
20 #define MTK_DRM_LATCH_CTL2 (DRM_BASE + 0x44)
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/dfd/
H A Dplat_dfd.h22 #define MTK_DRM_LATCH_CTL1 (DRM_BASE + 0x40)
23 #define MTK_DRM_LATCH_CTL2 (DRM_BASE + 0x44)
/rk3399_ARM-atf/plat/mediatek/mt8195/include/
H A Dplatform_def.h39 #define DRM_BASE (IO_PHYS + 0x0000D000) macro
/rk3399_ARM-atf/plat/mediatek/mt8188/include/
H A Dplatform_def.h68 #define DRM_BASE (IO_PHYS + 0x0000D000) macro
/rk3399_ARM-atf/plat/mediatek/mt8196/include/
H A Dplatform_def.h91 #define DRM_BASE (IO_PHYS + 0x0000D000) macro