| #
6ecae4d2 |
| 04-Nov-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(mt8188): add MT8188 TRNG driver" into integration
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| #
b88d1f52 |
| 07-Oct-2024 |
Suyuan Su <suyuan.su@mediatek.com> |
feat(mt8188): add MT8188 TRNG driver
Add MTK TRNG driver for MT8188.
Change-Id: I604edd42ffce9a153e209a015ba454b51da454e1 Signed-off-by: Suyuan Su <suyuan.su@mediatek.com> Signed-off-by: Gavin Liu
feat(mt8188): add MT8188 TRNG driver
Add MTK TRNG driver for MT8188.
Change-Id: I604edd42ffce9a153e209a015ba454b51da454e1 Signed-off-by: Suyuan Su <suyuan.su@mediatek.com> Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
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| #
f3ea17c3 |
| 02-Jul-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(mediatek): configure DEV_IRQ as G1S interrupt" into integration
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| #
240a1ecd |
| 17-Jun-2024 |
Gavin Liu <gavin.liu@mediatek.com> |
feat(mediatek): configure DEV_IRQ as G1S interrupt
In order to register DEV_IRQ as secure interrupt in OP-TEE, the the GICD EnableGrp1S should be enabled for DEV_IRQ. Add mtk_interrupt_props in MTK
feat(mediatek): configure DEV_IRQ as G1S interrupt
In order to register DEV_IRQ as secure interrupt in OP-TEE, the the GICD EnableGrp1S should be enabled for DEV_IRQ. Add mtk_interrupt_props in MTK GIC driver to configure the interrupt properly.
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com> Change-Id: Id909a42b535088c6d0dcaf803d3f2faf312ae846
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| #
ba8413ff |
| 01-Dec-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(mt8188): add secure iommu support" into integration
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| #
5fb5ff56 |
| 16-Nov-2023 |
kiwi liu <kiwi.liu@mediatek.corp-partner.google.com> |
feat(mt8188): add secure iommu support
The secure IOMMU has two secure banks: VDO and VPP. Add SiP call to report the secure bank status in debug build. About more background, please see: https://gi
feat(mt8188): add secure iommu support
The secure IOMMU has two secure banks: VDO and VPP. Add SiP call to report the secure bank status in debug build. About more background, please see: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/include/dt-bindings/memory/mediatek,mt8188-memory-port.h?id=d5cda142d649c690fb0fcf1e29f3df63fbafc442
Change-Id: I7b3319e84391fc6d7f456659f8b8c5d9d1c6ab9d Signed-off-by: Anan Sun <anan.sun@mediatek.corp-partner.google.com> Signed-off-by: Kiwi Liu <kiwi.liu@mediatek.corp-partner.google.com> Signed-off-by: Yong Wu <yong.wu@mediatek.com>
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| #
4c8e1f9a |
| 06-Jun-2023 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes I21d65a88,I949cfce9,If4249f22,Id0451bd1,I9e930070, ... into integration
* changes: feat(mediatek): add APU watchdog timeout control feat(mt8188): add emi mpu protection for APU sec
Merge changes I21d65a88,I949cfce9,If4249f22,Id0451bd1,I9e930070, ... into integration
* changes: feat(mediatek): add APU watchdog timeout control feat(mt8188): add emi mpu protection for APU secure memory feat(mt8188): add devapc setting of apusys rcx feat(mt8188): add backup/restore function when power on/off feat(mediatek): add APU bootup control smc call feat(mt8188): enable apusys mailbox mpu protect feat(mt8188): enable apusys domain remap feat(mt8188): add apusys ao devapc setting feat(mt8188): increase TZRAM_SIZE from 192KB to 256KB
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| #
5986ae57 |
| 24-Apr-2023 |
Karl Li <karl.li@mediatek.corp-partner.google.com> |
feat(mt8188): add devapc setting of apusys rcx
Apusys rcx is a subsys in apusys, and it is a basic domain of APU and it connects several components in APU. The devapc control of apusys rcx is also i
feat(mt8188): add devapc setting of apusys rcx
Apusys rcx is a subsys in apusys, and it is a basic domain of APU and it connects several components in APU. The devapc control of apusys rcx is also inside APU and it can only be set when APU is powered on. Then apusys kernel driver will trigger rcx devapc init by ATF smc call.
Change-Id: If4249f22a08690b1e4f5aa5f0cbfb54ccacf90e1 Signed-off-by: Karl Li <karl.li@mediatek.com> Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
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| #
94a9e624 |
| 19-Apr-2023 |
Chungying Lu <chungying.lu@mediatek.corp-partner.google.com> |
feat(mediatek): add APU bootup control smc call
Add APU bootup control smc call. The steps of bootup flow: 1. set up APU config. 2. reset APU. 3. set up APU boot config. 4. boot APU.
Change
feat(mediatek): add APU bootup control smc call
Add APU bootup control smc call. The steps of bootup flow: 1. set up APU config. 2. reset APU. 3. set up APU boot config. 4. boot APU.
Change-Id: I9e930070a64c7c4dcaa3a8b3d28b897823e9f53c Signed-off-by: Chungying Lu <chungying.lu@mediatek.com> Signed-off-by: Karl Li <karl.li@mediatek.com>
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| #
ad7673ad |
| 27-Apr-2023 |
Karl Li <karl.li@mediatek.corp-partner.google.com> |
feat(mt8188): enable apusys mailbox mpu protect
Enable apusys mailbox mpu protect.
Change-Id: Idbf67084037b7ecf4926f57a901075f98540ee57 Signed-off-by: Karl Li <karl.li@mediatek.com> Signed-off-by:
feat(mt8188): enable apusys mailbox mpu protect
Enable apusys mailbox mpu protect.
Change-Id: Idbf67084037b7ecf4926f57a901075f98540ee57 Signed-off-by: Karl Li <karl.li@mediatek.com> Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
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| #
b5900c92 |
| 27-Apr-2023 |
Karl Li <karl.li@mediatek.corp-partner.google.com> |
feat(mt8188): enable apusys domain remap
Enable apusys domain remap to protect no-protect memory. - Remap request which from domain 5 to domain 14. - Remap request which from domain 7 to domain
feat(mt8188): enable apusys domain remap
Enable apusys domain remap to protect no-protect memory. - Remap request which from domain 5 to domain 14. - Remap request which from domain 7 to domain 14.
Change-Id: Iccd188e3b8edbe916fa9767c841a844b66c6011f Signed-off-by: Karl Li <karl.li@mediatek.com> Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
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| #
777e3b71 |
| 21-Apr-2023 |
Karl Li <karl.li@mediatek.corp-partner.google.com> |
feat(mt8188): add apusys ao devapc setting
Apusys ao devapc is a set of control registers inside APU, and it controls the access permission of APU ao domain. Moreover, apusys ao devapc must be set a
feat(mt8188): add apusys ao devapc setting
Apusys ao devapc is a set of control registers inside APU, and it controls the access permission of APU ao domain. Moreover, apusys ao devapc must be set after apusys power init, so we need to place the drivers in TF-A instead of coreboot.
Change-Id: Ife849c32d4dd9dca15432d4b8a51753fde61b148 Signed-off-by: Karl Li <karl.li@mediatek.com> Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
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| #
aa1cb279 |
| 06-Jun-2023 |
Karl Li <karl.li@mediatek.com> |
feat(mt8188): increase TZRAM_SIZE from 192KB to 256KB
Increase TZRAM_SIZE to 256KB for MT8188 APUSYS.
Change-Id: Iabe1a4aeb79ba23c3e963170a8eb9ce19f2925f3 Signed-off-by: Karl Li <karl.li@mediatek.c
feat(mt8188): increase TZRAM_SIZE from 192KB to 256KB
Increase TZRAM_SIZE to 256KB for MT8188 APUSYS.
Change-Id: Iabe1a4aeb79ba23c3e963170a8eb9ce19f2925f3 Signed-off-by: Karl Li <karl.li@mediatek.com>
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| #
c629e8d8 |
| 17-Apr-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(mt8188): add apu power on/off control" into integration
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| #
8e38b928 |
| 15-Mar-2023 |
Chungying Lu <chungying.lu@mediatek.corp-partner.google.com> |
feat(mt8188): add apu power on/off control
Add mt8188 apu power on/off control
Change-Id: I8e28bf7a4ad4067553981c67c4c2225fdd802859 Signed-off-by: Chungying Lu <chungying.lu@mediatek.com> Signed-of
feat(mt8188): add apu power on/off control
Add mt8188 apu power on/off control
Change-Id: I8e28bf7a4ad4067553981c67c4c2225fdd802859 Signed-off-by: Chungying Lu <chungying.lu@mediatek.com> Signed-off-by: jason-ch chen <Jason-ch.Chen@mediatek.com>
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| #
a251f99a |
| 29-Mar-2023 |
Mark Dykes <mark.dykes@arm.com> |
Merge "feat(mediatek): add APU init flow" into integration
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| #
52430916 |
| 15-Mar-2023 |
Chungying Lu <chungying.lu@mediatek.corp-partner.google.com> |
feat(mediatek): add APU init flow
The patch brings preparation steps before powering on APU (AI processing unit)
Change-Id: Ica01e035153ec6f3af0de6ba2c66b17a064f8c89 Signed-off-by: Chungying Lu <ch
feat(mediatek): add APU init flow
The patch brings preparation steps before powering on APU (AI processing unit)
Change-Id: Ica01e035153ec6f3af0de6ba2c66b17a064f8c89 Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
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| #
79c26232 |
| 18-Jan-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "mtk_spm" into integration
* changes: refactor(mediatek): add new LPM API for further extension refactor(mediatek): change the parameters of LPM API refactor(mediatek)
Merge changes from topic "mtk_spm" into integration
* changes: refactor(mediatek): add new LPM API for further extension refactor(mediatek): change the parameters of LPM API refactor(mediatek): change LPM header file path for further extension feat(mt8188): keep infra and peri on when system suspend feat(mt8188): enable SPM and LPM feat(mt8188): add SPM feature support feat(mt8188): add MT8188 SPM support feat(mediatek): add SPM's SSPM notifier feat(mt8188): add the register definitions accessed by SPM feat(mediatek): add new features of LPM
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| #
1a64689d |
| 07-Sep-2022 |
James Liao <jamesjj.liao@mediatek.com> |
feat(mt8188): add the register definitions accessed by SPM
SPM needs to access some modules' registers to decide its sleep behavior. This patch add these register definitions to platform_def.h.
Sig
feat(mt8188): add the register definitions accessed by SPM
SPM needs to access some modules' registers to decide its sleep behavior. This patch add these register definitions to platform_def.h.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Change-Id: I3bebe74e367d5f6a7b59563036e18a83a3ef31e9
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| #
84498ad1 |
| 14-Nov-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I5838964f,Id752c1cc,Idd42d5a2,Iff4680cd,I2b1801a7, ... into integration
* changes: fix(mt8188): add mmap entry for CPU idle SRAM fix(mt8188): refine gic init flow after system resu
Merge changes I5838964f,Id752c1cc,Idd42d5a2,Iff4680cd,I2b1801a7, ... into integration
* changes: fix(mt8188): add mmap entry for CPU idle SRAM fix(mt8188): refine gic init flow after system resume fix(mt8186): fix the DRAM voltage after the system resumes feat(mt8188): add audio support refactor(mt8195): use ptp3 common drivers feat(mt8188): add support for PTP3 feat(mt8188): enable MTK_PUBEVENT_ENABLE
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| #
32071c02 |
| 11-Nov-2022 |
Liju-Clr Chen <liju-clr.chen@mediatek.com> |
fix(mt8188): add mmap entry for CPU idle SRAM
CPU PM driver accesses CPU idle SRAM during the system suspend process. The region of CPU idle SRAM needs to be added as mmap entry. Otherwise, the exec
fix(mt8188): add mmap entry for CPU idle SRAM
CPU PM driver accesses CPU idle SRAM during the system suspend process. The region of CPU idle SRAM needs to be added as mmap entry. Otherwise, the execption would occur.
BUG=b:244215539 TEST=Test of suspend resume passes.
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com> Change-Id: I5838964fd9cb1b833e4006e2123febb4a4601003
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| #
c70f567a |
| 20-Sep-2022 |
Trevor Wu <trevor.wu@mediatek.com> |
feat(mt8188): add audio support
For MT8188, MTK_AUDIO_SMC_OP_DOMAIN_SIDEBANDS is required for normal mode switch. - Add audio common code and chip specific code. - Add new id (MTK_SIP_AUDIO_CONT
feat(mt8188): add audio support
For MT8188, MTK_AUDIO_SMC_OP_DOMAIN_SIDEBANDS is required for normal mode switch. - Add audio common code and chip specific code. - Add new id (MTK_SIP_AUDIO_CONTROL) to mtk_sip_def.h. - Enable for MT8188.
Signed-off-by: Trevor Wu <trevor.wu@mediatek.com> Change-Id: Iff4680cd0b520b2b519ecf30ecafe100f147cc62
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| #
af1ee1fa |
| 05-Oct-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "mt8188 cpu_pm" into integration
* changes: feat(mediatek): move lpm drivers back to common feat(mt8188): add cpu_pm driver fix(mt8188): refine c-state power domain fo
Merge changes from topic "mt8188 cpu_pm" into integration
* changes: feat(mediatek): move lpm drivers back to common feat(mt8188): add cpu_pm driver fix(mt8188): refine c-state power domain for extensibility
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| #
4fe7e6a8 |
| 05-Sep-2022 |
Edward-JW Yang <edward-jw.yang@mediatek.com> |
feat(mt8188): add cpu_pm driver
- Add cpu_pm driver for CPU idle and SMP flow. - Add SMP driver for CPU power on/off control. - Add CPC driver to handle CPU powered on/off in CPU suspend. - Add mbox
feat(mt8188): add cpu_pm driver
- Add cpu_pm driver for CPU idle and SMP flow. - Add SMP driver for CPU power on/off control. - Add CPC driver to handle CPU powered on/off in CPU suspend. - Add mbox driver for tinysys support.
Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com> Change-Id: I20141474e1c43cdfacb9f2c6a2285721e50a617c
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| #
60239450 |
| 22-Sep-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "mediatek upstream" into integration
* changes: refactor(mt8188): move platform_def.h to mt8188/include feat(mt8188): add MCUSYS support feat(mt8188): add armv8.2 supp
Merge changes from topic "mediatek upstream" into integration
* changes: refactor(mt8188): move platform_def.h to mt8188/include feat(mt8188): add MCUSYS support feat(mt8188): add armv8.2 support feat(mt8188): add DFD control in SiP service feat(mt8188): add EMI MPU basic drivers feat(mt8188): add DCM driver feat(mt8188): add reset and poweroff functions feat(mediatek): add more flexibility of mtk_pm.c feat(mediatek): add more options for build helper feat(mt8188): add LPM driver support feat(mt8188): apply ERRATA for CA-78 fix(mediatek): remove unused cold_boot.[c|h] fix(mediatek): wrap cold_boot.h with MTK_SIP_KERNEL_BOOT_ENABLE feat(mt8186): add EMI MPU support for SCP and DSP
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