| #
02309a84 |
| 27-May-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge changes Ia29fd72f,I31b359ce,I1296aaff,I30e1ee7f,Ib4a3593e, ... into integration
* changes:
feat(mt8196): add SMMU SID stub implementation
feat(mt8196): add SLBC SiP handler
feat(mt8196):
Merge changes Ia29fd72f,I31b359ce,I1296aaff,I30e1ee7f,Ib4a3593e, ... into integration
* changes:
feat(mt8196): add SMMU SID stub implementation
feat(mt8196): add SLBC SiP handler
feat(mt8196): add CPU QoS stub implementation
refactor(mediatek): update EMI stub implementation
feat(mediatek): add APIs exposed to the static library
feat(mt8196): add MMinfra support
feat(mt8196): add UFS functions used by the static library
show more ...
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| #
00105882 |
| 28-Apr-2025 |
Yidi Lin <yidilin@chromium.org> |
refactor(mediatek): update EMI stub implementation
Refactor EMI stub implementation with following changes.
- Move the SiP call handlers to TF-A upstream.
- Move EMI definition used by APUSYS to pla
refactor(mediatek): update EMI stub implementation
Refactor EMI stub implementation with following changes.
- Move the SiP call handlers to TF-A upstream.
- Move EMI definition used by APUSYS to platform_def.h.
- Remove CONFIG_MTK_APUSYS_EMI_SUPPORT.
Change-Id: I30e1ee7f2ea2d6dc3415adba91cbe310af9b5eeb
Signed-off-by: Yidi Lin <yidilin@chromium.org>
show more ...
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| #
c33b98d7 |
| 23-Apr-2025 |
Yidi Lin <yidilin@chromium.org> |
feat(mt8196): add MMinfra support
Add MMinfra support for MT8196.
Change-Id: I5504764d05fecace4f0d3981785ff1bc8ae13d00
Signed-off-by: Yidi Lin <yidilin@chromium.org>
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| #
0f38b9f8 |
| 10-Feb-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "fix(mt8196): fix wrong register offset of dptx on MT8196" into integration
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| #
b38f8f7a |
| 07-Feb-2025 |
Gavin Liu <gavin.liu@mediatek.com> |
fix(mt8196): fix wrong register offset of dptx on MT8196
Fix wrong register offset of dptx on MT8196.
Change-Id: I46f7ac7751d14c9093b7b5bd1c741179a7fbbd34
Signed-off-by: Gavin Liu <gavin.liu@mediat
fix(mt8196): fix wrong register offset of dptx on MT8196
Fix wrong register offset of dptx on MT8196.
Change-Id: I46f7ac7751d14c9093b7b5bd1c741179a7fbbd34
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
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| #
efff459b |
| 06-Feb-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "fix(mt8196): remove CPU_IDLE_SRAM_BASE entry from plat_mmap" into integration
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| #
83f37d99 |
| 06-Feb-2025 |
Gavin Liu <gavin.liu@mediatek.com> |
fix(mt8196): remove CPU_IDLE_SRAM_BASE entry from plat_mmap
This region is defined in LPM driver. Prefer managing this region in
LPM driver and remove it from plat_mmap and platform_def.h.
Change-I
fix(mt8196): remove CPU_IDLE_SRAM_BASE entry from plat_mmap
This region is defined in LPM driver. Prefer managing this region in
LPM driver and remove it from plat_mmap and platform_def.h.
Change-Id: I57bfaad88a28d4f29e2b132ba080bc7d5b8248d8
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
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| #
e6cbdb00 |
| 05-Feb-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge changes I65b9e341,I7f3c42cb,I1bb1771d into integration
* changes:
feat(mt8196): add reset and poweroff function for PSCI call
feat(mt8196): refactor LPM header include paths to use lpm_v2
Merge changes I65b9e341,I7f3c42cb,I1bb1771d into integration
* changes:
feat(mt8196): add reset and poweroff function for PSCI call
feat(mt8196): refactor LPM header include paths to use lpm_v2
refactor(mediatek): update API calls to MTK GIC v3 driver
show more ...
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| #
22d74da7 |
| 19-Apr-2024 |
Yidi Lin <yidilin@chromium.org> |
feat(mt8196): add reset and poweroff function for PSCI call
Add reset and poweroff function for PSCI call.
Change-Id: I65b9e341b74f568f968f3c464a64ea754284cb8c
Signed-off-by: Yidi Lin <yidilin@chro
feat(mt8196): add reset and poweroff function for PSCI call
Add reset and poweroff function for PSCI call.
Change-Id: I65b9e341b74f568f968f3c464a64ea754284cb8c
Signed-off-by: Yidi Lin <yidilin@chromium.org>
show more ...
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| #
6ef685a9 |
| 31-Jan-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge changes I58637b8d,I4bb1a50a,Iadac6549,I758e933f into integration
* changes:
feat(mt8196): turn on APU smpu protection
feat(mt8196): enable APU spmi operation
feat(mt8196): add Mediatek M
Merge changes I58637b8d,I4bb1a50a,Iadac6549,I758e933f into integration
* changes:
feat(mt8196): turn on APU smpu protection
feat(mt8196): enable APU spmi operation
feat(mt8196): add Mediatek MMinfra stub implementation
feat(mt8196): enable cirq for MediaTek MT8196
show more ...
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| #
49d8c112 |
| 02-Dec-2024 |
ot_chhao.chang <ot_chhao.chang@mediatek.com> |
feat(mt8196): enable cirq for MediaTek MT8196
- Add CIRQ related information.
Signed-off-by: ot_chhao.chang <ot_chhao.chang@mediatek.com>
Change-Id: I758e933f9d53f7bfb16e3d7feb1c7f53516b1da6
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| #
ff821025 |
| 29-Jan-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "feat(mediatek): add gic driver" into integration
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| #
cf2df874 |
| 28-Jan-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge changes I1126311e,I6ae5b5b4,I1b907256,I9facb6bf,Ie51cffeb, ... into integration
* changes:
feat(mt8196): add vcore dvfs drivers
feat(mt8196): add LPM v2 support
feat(mt8196): add SPM com
Merge changes I1126311e,I6ae5b5b4,I1b907256,I9facb6bf,Ie51cffeb, ... into integration
* changes:
feat(mt8196): add vcore dvfs drivers
feat(mt8196): add LPM v2 support
feat(mt8196): add SPM common version support
feat(mt8196): add SPM common driver support
feat(mt8196): add SPM basic features support
feat(mt8196): add SPM features support
feat(mt8196): enable PMIC low power setting
feat(mt8196): add mcdi driver
feat(mt8196): add pwr_ctrl module for CPU power management
feat(mt8196): add mcusys moudles for power management
feat(mt8196): add CPC module for power management
feat(mt8196): add topology module for power management
feat(mt8196): add SPMI driver
feat(mt8196): add PMIC driver
show more ...
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| #
fb57af70 |
| 20-Dec-2024 |
Wenzhen Yu <wenzhen.yu@mediatek.com> |
feat(mt8196): add SPM basic features support
This patch mainly collects and organizes SPM state information to
facilitate debugging when issues arise.
Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek
feat(mt8196): add SPM basic features support
This patch mainly collects and organizes SPM state information to
facilitate debugging when issues arise.
Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: Ie51cffeb1d683d65d88701fc63c426b20b22492f
show more ...
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| #
5cb0bc07 |
| 03-Dec-2024 |
Kai Liang <kai.liang@mediatek.com> |
feat(mt8196): add mcdi driver
Add MCDI driver to manage CPU idle states and optimize power consumption.
Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I3a2e163730dd997dd72f2ebc1375dea
feat(mt8196): add mcdi driver
Add MCDI driver to manage CPU idle states and optimize power consumption.
Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I3a2e163730dd997dd72f2ebc1375dea38d728cb7
show more ...
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| #
4ba679da |
| 28-Dec-2024 |
Kai Liang <kai.liang@mediatek.com> |
feat(mt8196): add pwr_ctrl module for CPU power management
Implement pwr_ctrl module to manage CPU power.
Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I73a7a8a2d0b120b7225c2f3239901
feat(mt8196): add pwr_ctrl module for CPU power management
Implement pwr_ctrl module to manage CPU power.
Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I73a7a8a2d0b120b7225c2f323990176397b6e4a5
show more ...
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| #
adf73ae2 |
| 13-Dec-2024 |
Hope Wang <hope.wang@mediatek.corp-partner.google.com> |
feat(mt8196): add SPMI driver
Add SPMI and PMIF driver for PMIC communication
Change-Id: Iad1d90381d6dad6b3e92fd9d6a3ce02fa11d15f1
Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.c
feat(mt8196): add SPMI driver
Add SPMI and PMIF driver for PMIC communication
Change-Id: Iad1d90381d6dad6b3e92fd9d6a3ce02fa11d15f1
Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.com>
show more ...
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| #
d905b3df |
| 19-Dec-2024 |
Runyang Chen <runyang.chen@mediatek.com> |
feat(mediatek): add gic driver
Add GIC driver for taking interrupts to core.
Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Change-Id: Id4d702b8579488befc1a1b6d37e66287dd534798
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| #
4e59323c |
| 13-Jan-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(mt8196): add Mediatek EMI stub implementation for mt8196" into integration
|
| #
39f5e278 |
| 31-Dec-2024 |
Gavin Liu <gavin.liu@mediatek.corp-partner.google.com> |
feat(mt8196): add Mediatek EMI stub implementation for mt8196
Implement stub functions for the EMI driver to ensure that the build
can pass when a prebuilt library is not available.
Change-Id: I296
feat(mt8196): add Mediatek EMI stub implementation for mt8196
Implement stub functions for the EMI driver to ensure that the build
can pass when a prebuilt library is not available.
Change-Id: I296945a3df6766a3a133cd385a1e5038ca979403
Signed-off-by: Gavin Liu <gavin.liu@mediatek.corp-partner.google.com>
show more ...
|
| #
999503d2 |
| 24-Dec-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes Ic746571b,I1926cab9,Id70162e9,I3a9b014e,Ic99adba1, ... into integration
* changes:
feat(mt8196): enable APU on mt8196
feat(mt8196): add APU SMMU hardware semaphore operations
fea
Merge changes Ic746571b,I1926cab9,Id70162e9,I3a9b014e,Ic99adba1, ... into integration
* changes:
feat(mt8196): enable APU on mt8196
feat(mt8196): add APU SMMU hardware semaphore operations
feat(mt8196): add smpu protection for APU secure memory
feat(mt8196): add APU RCX DevAPC setting
feat(mt8196): add APU kernel control operations
feat(mt8196): add APU power on/off functions
feat(mt8196): add APUMMU setting
feat(mt8196): enable apusys mailbox mpu protection
feat(mt8196): enable apusys security control
feat(mt8196): add APUSYS AO DevAPC setting
feat(mt8196): add APU power-on init flow
show more ...
|
| #
f31932b4 |
| 14-Nov-2024 |
Karl Li <karl.li@mediatek.com> |
feat(mt8196): add APU RCX DevAPC setting
APU RCX is a sub-domain in apusys, connecting several APU components.
The APU RCX DevAPC control lives in APU and can only be set after
APU is powered on.
Th
feat(mt8196): add APU RCX DevAPC setting
APU RCX is a sub-domain in apusys, connecting several APU components.
The APU RCX DevAPC control lives in APU and can only be set after
APU is powered on.
The APUSYS kernel driver will trigger RCX DevAPC init by smc call.
Change-Id: I3a9b014ea1be7ee80fd6861ad088f1dec5410872
Signed-off-by: Karl Li <karl.li@mediatek.com>
show more ...
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| #
5e5c57d5 |
| 14-Nov-2024 |
Karl Li <karl.li@mediatek.com> |
feat(mt8196): add APU kernel control operations
Add APU kernel control operations to provide the bootup init functions.
1. Add software workaround for certain operations on mt8196.
2. Add APU logge
feat(mt8196): add APU kernel control operations
Add APU kernel control operations to provide the bootup init functions.
1. Add software workaround for certain operations on mt8196.
2. Add APU logger operations.
3. Add function to clear mbox spare register, which is used in APU
booting process.
4. Add function to setup CE binary to make sure the CE binary version
is align with the APU firmware.
Change-Id: Ic99adba1409c020c72179ea135e0d4291fc3f384
Signed-off-by: Karl Li <karl.li@mediatek.com>
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| #
e534d4f6 |
| 15-Nov-2024 |
Karl Li <karl.li@mediatek.com> |
feat(mt8196): add APUMMU setting
APUMMU is the MMU in APU, which is responsible for inner address
mapping. The APU kernel driver will setup the APUMMU by SMC call.
Change-Id: Iad7532883e42c288aeb0d
feat(mt8196): add APUMMU setting
APUMMU is the MMU in APU, which is responsible for inner address
mapping. The APU kernel driver will setup the APUMMU by SMC call.
Change-Id: Iad7532883e42c288aeb0d23ab419f4dc6d8630f2
Signed-off-by: Karl Li <karl.li@mediatek.com>
show more ...
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| #
83f836c9 |
| 14-Nov-2024 |
Karl Li <karl.li@mediatek.com> |
feat(mt8196): enable apusys mailbox mpu protection
Enable mt8196 apusys mailbox mpu protection and
move the mt8188 setting to platform folder
Change-Id: I76b68318bb88e56b12cdacd9e2b998699ca6b48e
Si
feat(mt8196): enable apusys mailbox mpu protection
Enable mt8196 apusys mailbox mpu protection and
move the mt8188 setting to platform folder
Change-Id: I76b68318bb88e56b12cdacd9e2b998699ca6b48e
Signed-off-by: Karl Li <karl.li@mediatek.com>
show more ...
|