Searched refs:CSS (Results 1 – 15 of 15) sorted by relevance
| /rk3399_ARM-atf/drivers/nxp/clk/s32cc/include/ |
| H A D | s32cc-clk-regs.h | 109 #define MC_CGM_MUXn_DIV_UPD_STAT_DIVSTAT(CSS) \ argument 111 & (CSS)) \
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| /rk3399_ARM-atf/docs/plat/arm/automotive_rd/ |
| H A D | rdaspen.rst | 1 RD-Aspen (Zena CSS) Platform 13 Further information on RD-Aspen is available at `Zena CSS`_ 114 .. _Zena CSS: https://www.arm.com/products/automotive/compute-subsystems/zena
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| /rk3399_ARM-atf/docs/ |
| H A D | global_substitutions.txt | 10 .. |CSS| replace:: :term:`CSS`
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| H A D | glossary.rst | 36 CSS
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| H A D | change-log.md | 724 - **CSS** 1988 - **CSS** 2947 …- adapt order of CSS on LSE and HSE ([eca5103](https://review.trustedfirmware.org/plugins/gitiles/… 3085 …- add CSS definitions for third gen platforms ([6d52713](https://review.trustedfirmware.org/plugin… 3687 - **CSS** 5611 - **CSS** 6581 - **CSS**
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| H A D | porting-guide.rst | 2102 On Arm CSS platforms ``plat_info`` is interpreted as an ``image_info_t`` structure,
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| /rk3399_ARM-atf/docs/design/ |
| H A D | interrupt-framework-design.rst | 90 #. **CSS**. Current Security State. ``0`` when secure and ``1`` when non-secure 98 #. **CSS=0, TEL3=0**. Interrupt is routed to the FEL when execution is in 102 #. **CSS=0, TEL3=1**. Interrupt is routed to EL3 when execution is in secure 106 #. **CSS=1, TEL3=0**. Interrupt is routed to the FEL when execution is in 111 #. **CSS=1, TEL3=1**. Interrupt is routed to EL3 when execution is in 118 #. **CSS=0, TEL3=0**. Interrupt is routed to the FEL when execution is in 125 #. **CSS=0, TEL3=1**. Interrupt is routed to EL3 when execution is in secure 132 #. **CSS=1, TEL3=0**. Interrupt is routed to FEL when execution is in 136 #. **CSS=1, TEL3=1**. Interrupt is routed to EL3 when execution is in 146 #. **CSS=0, TEL3=0**. Interrupt is routed to the FEL when execution is in [all …]
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| /rk3399_ARM-atf/fdts/ |
| H A D | stmm_template.dts | 39 * ARM CSS SoC Peripherals area.
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| /rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn2/fdts/ |
| H A D | rdn2_stmm_sel0_manifest.dts | 64 * ARM CSS SoC Expansion Peripherals.
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| /rk3399_ARM-atf/docs/plat/arm/ |
| H A D | arm-build-options.rst | 119 Arm CSS Platform-Specific Build Options 138 CPU core on reset. This build option can be used on CSS platforms that
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| /rk3399_ARM-atf/drivers/st/clk/ |
| H A D | clk-stm32-core.h | 327 #define CSS(_offset, _bit_css) &(struct stm32_clk_css){\ macro
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| H A D | clk-stm32mp13.c | 1655 CSS(RCC_BDCR, 8), 1660 CSS(RCC_OCENSETR, 11),
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| H A D | clk-stm32mp2.c | 659 CSS(RCC_OCENSETR, 11), 664 CSS(RCC_BDCR, 8),
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| /rk3399_ARM-atf/docs/components/ |
| H A D | firmware-update.rst | 159 Arm CSS platforms like Juno have a System Control Processor (SCP), and these
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| H A D | exception-handling.rst | 151 as :ref:`CSS=0, TEL3=0 <EL3 interrupts>`.
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