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/optee_os/core/arch/arm/kernel/
H A Dentry_a64.S40 adr_l x2, stack_tmp_rel
41 ldr w0, [x2]
42 add x0, x0, x2
172 mov x21, x2
199 adr x2, __init_end
200 sub x2, x2, x0 /* init len */
201 ldr w4, [x1, x2] /* length of hashes etc */
202 add x2, x2, x4 /* length of init and hashes etc */
204 add x0, x0, x2 /* __init_start + len */
205 add x1, x1, x2 /* __data_end + len */
[all …]
H A Dthread_a64.S72 msr elr_el1, x2
80 write_apiakeylo x2
172 msr elr_el1, x2
179 write_apiakeylo x2
687 mrs x2, esr_el1
689 lsr x2, x2, #ESR_EC_SHIFT
690 cmp x2, #ESR_EC_AARCH64_SVC
695 mrs x2, esr_el1
697 lsr x2, x2, #ESR_EC_SHIFT
698 cmp x2, #ESR_EC_AARCH32_SVC
[all …]
H A Darch_scall_a64.S39 ldr x2, [x0, #THREAD_SCALL_REG_SPSR]
40 tst x2, #(SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT)
75 add x2, xzr, x6, lsl #2
109 subs x2, x0, #0x4
111 lsl x2, x2, #3
112 mov x0, x2
116 str x3, [x2], #8
117 cmp x2, x19
177 mov x2, #0 /* panic_code = 0 */
192 mov x2, x0 /* code */
H A Dcache_helpers_a64.S29 dcache_line_size x2, x3
31 sub x3, x2, #1
35 add x0, x0, x2
109 add x2, x10, x10, lsr #1 // work out 3x current cache level
110 lsr x1, x0, x2 // extract cache type bits from clidr
118 and x2, x1, #7 // extract the length of the cache lines
119 add x2, x2, #4 // add 4 (line length offset)
227 icache_line_size x2, x3
229 sub x3, x2, #1
233 add x0, x0, x2
H A Dthread_spmc_a64.S21 mov x2, #FFA_PARAM_MBZ /* Param MBZ */
34 mov x2, #FFA_PARAM_MBZ /* Param MBZ */
48 mov x2, #FFA_PARAM_MBZ /* RES MBZ */
151 read_apiakeylo x2
157 mov x2, sp
158 str x2, [x19, #THREAD_CTX_REGS_SP]
168 adr x2, .thread_rpc_return
H A Dthread_optee_smc_a64.S172 mov x2, #0
194 read_apiakeylo x2
200 mov x2, sp
201 str x2, [x19, #THREAD_CTX_REGS_SP]
211 adr x2, .thread_rpc_return
217 mov x2, x22
H A Dmisc_a64.S51 ubfx x2, x3, #MPIDR_AFF2_SHIFT, #MPIDR_AFFINITY_BITS
52 add x1, x1, x2, LSL #(CFG_CORE_CLUSTER_SHIFT)
H A Dasm-defines.c57 DEFINE(THREAD_SCALL_REG_X2, offsetof(struct thread_scall_regs, x2));
73 DEFINE(THREAD_ABT_REG_X2, offsetof(struct thread_abort_regs, x2));
H A Darch_scall.c78 .x2 = pushed[3], in save_panic_regs_a32_ta()
/optee_os/core/arch/arm/plat-rcar/
H A Dcore_pos_a64.S46 adr_l x2, rcar_prr_value
47 ldr w3, [x2]
52 mov x2, #PRR_BASE
53 ldr w3, [x2, #PRR_OFFSET]
61 adr_l x2, rcar_prr_value
62 str w3, [x2]
H A Dromapi_call.S26 mov x21, x2
76 mov x2, x22 /* x22: uint64_t arg3 */
/optee_os/core/arch/arm/plat-marvell/otx2/
H A Dcore_pos.S11 mov x2, #CFG_CLUSTERS_PER_NODE
12 mul x1, x1, x2
13 ubfx x2, x0, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS
14 add x0, x1, x2
/optee_os/core/arch/arm/plat-automotive_rd/
H A Drd1ae_core_pos.S21 ubfx x2, x4, #MPIDR_AFF2_SHIFT, #MPIDR_AFFINITY_BITS
26 madd x2, x3, x4, x2
28 madd x1, x2, x4, x1
/optee_os/core/lib/libtomcrypt/src/ciphers/
H A Didea.c104 ushort16 x0, x1, x2, x3, t0, t1; in s_process_block() local
108 LOAD16(x2, in + 4); in s_process_block()
114 x2 += m_key[i*6+2]; in s_process_block()
116 t0 = x0^x2; in s_process_block()
124 x1 = x2^t1; in s_process_block()
125 x2 = t0; in s_process_block()
129 x2 += m_key[LTC_IDEA_ROUNDS*6+1]; in s_process_block()
134 STORE16(x2, out + 2); in s_process_block()
/optee_os/core/lib/libtomcrypt/src/stream/sosemanuk/
H A Dsosemanuk.c175 #define SERPENT_LT(x0, x1, x2, x3) do { \ argument
177 x2 = ROLc(x2, 3); \
178 x1 = x1 ^ x0 ^ x2; \
179 x3 = x3 ^ x2 ^ T32(x0 << 3); \
183 x2 = x2 ^ x3 ^ T32(x1 << 7); \
185 x2 = ROLc(x2, 22); \
337 #define KA(zc, x0, x1, x2, x3) do { \ in sosemanuk_setiv() argument
340 x2 ^= st->kc[(zc) + 2]; \ in sosemanuk_setiv()
608 #define FSM(x0, x1, x2, x3, x4, x5, x6, x7, x8, x9) do { \ in s_sosemanuk_internal() argument
621 #define LRU(x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, dd) do { \ in s_sosemanuk_internal() argument
[all …]
/optee_os/core/arch/arm/crypto/
H A Daes_modes_armv8a_ce_a64.S152 encrypt_block2x v0, v1, w3, x2, x6, w7
157 decrypt_block2x v0, v1, w3, x2, x6, w7
164 encrypt_block4x v0, v1, v2, v3, w3, x2, x6, w7
169 decrypt_block4x v0, v1, v2, v3, w3, x2, x6, w7
198 encrypt_block2x v0, v1, w3, x2, x6, w7
202 decrypt_block2x v0, v1, w3, x2, x6, w7
206 encrypt_block4x v0, v1, v2, v3, w3, x2, x6, w7
210 decrypt_block4x v0, v1, v2, v3, w3, x2, x6, w7
245 enc_prepare w3, x2, x5
267 encrypt_block v0, w3, x2, x5, w6
[all …]
H A Dsm4_armv8a_ce_a64.S379 adr x2, .Lfk
380 ld1 {TMP8.4s}, [x2]
381 adr x2, .Lck
382 ld1 {TMP0.4s, TMP1.4s, TMP2.4s, TMP3.4s}, [x2], 64
384 ld1 {TMP4.4s, TMP5.4s, TMP6.4s, TMP7.4s}, [x2]
406 adr x2, .Lfk
407 ld1 {TMP8.4s}, [x2]
408 adr x2, .Lck
409 ld1 {TMP0.4s, TMP1.4s, TMP2.4s, TMP3.4s}, [x2], 64
411 ld1 {TMP4.4s, TMP5.4s, TMP6.4s, TMP7.4s}, [x2]
[all …]
/optee_os/core/arch/arm/plat-d06/
H A Dcore_pos_a64.S23 and x2, x1, 0x7
43 add x5, x5, x2
/optee_os/lib/libutee/arch/arm/
H A Dutee_syscalls_a64.S22 stp x2, x3, [sp, #32]
28 ldp x2, x3, [sp, #32]
/optee_os/lib/libutils/ext/arch/arm/
H A Dmcount_a64.S64 stp x2, x3, [sp, #16]
74 ldp x2, x3, [sp, #16]
/optee_os/core/arch/arm/include/kernel/
H A Darch_scall.h52 regs->x2 = panic_code; in scall_set_sys_return_regs()
H A Dthread_arch.h194 uint64_t x2; /* r2_usr */ member
253 uint64_t x2; /* r2_usr */ member
/optee_os/core/arch/arm/dts/
H A Dstm32mp131.dtsi49 opp-supported-hw = <0x2>;
57 opp-supported-hw = <0x2>;
184 st,syscfg-fmp = <&syscfg 0x4 0x2>;
365 reg = <0x0 0x2>;
368 reg = <0x4 0x2>;
384 reg = <0x5c 0x2>;
387 reg = <0x5e 0x2>;
H A Dfsl-lx2160a-rdb.dts91 reg = <0x2>;
/optee_os/core/crypto/
H A Dsm4.c118 static uint32_t sm4F(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3, in sm4F() argument
121 return x0 ^ sm4Lt(x1 ^ x2 ^ x3 ^ rk); in sm4F()

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