Home
last modified time | relevance | path

Searched refs:stm32mp_syscfg_read (Results 1 – 4 of 4) sorted by relevance

/optee_os/core/arch/arm/plat-stm32mp2/
H A Dstm32_sysconf.h119 uint32_t stm32mp_syscfg_read(uint32_t id);
/optee_os/core/arch/arm/plat-stm32mp2/drivers/
H A Dstm32mp25_syscfg.c58 uint32_t stm32mp_syscfg_read(uint32_t id) in stm32mp_syscfg_read() function
/optee_os/core/drivers/clk/
H A Dclk-stm32mp21.c1289 uint32_t chgclkreq = stm32mp_syscfg_read(CA35SS_SSC_CHGCLKREQ); in stm32mp2_a35_ss_on_bypass()
1306 if (!(stm32mp_syscfg_read(CA35SS_SSC_CHGCLKREQ) & in stm32mp2_a35_ss_on_bypass()
1309 if (stm32mp_syscfg_read(CA35SS_SSC_CHGCLKREQ) & in stm32mp2_a35_ss_on_bypass()
1320 if (stm32mp_syscfg_read(CA35SS_SSC_CHGCLKREQ) & in stm32mp2_a35_ss_on_bypass()
1324 if (!(stm32mp_syscfg_read(CA35SS_SSC_CHGCLKREQ) & in stm32mp2_a35_ss_on_bypass()
1354 if (stm32mp_syscfg_read(CA35SS_SSC_PLL_EN) & in stm32mp2_a35_pll1_start()
1358 if (!(stm32mp_syscfg_read(CA35SS_SSC_PLL_EN) & in stm32mp2_a35_pll1_start()
1377 if (!(stm32mp_syscfg_read(CA35SS_SSC_CHGCLKREQ) & in stm32mp2_a35_pll1_start()
1381 if (stm32mp_syscfg_read(CA35SS_SSC_CHGCLKREQ) & in stm32mp2_a35_pll1_start()
2073 uint32_t reg = stm32mp_syscfg_read(CA35SS_SSC_PLL_FREQ1); in clk_get_pll1_fvco_rate()
[all …]
H A Dclk-stm32mp25.c1307 uint32_t chgclkreq = stm32mp_syscfg_read(CA35SS_SSC_CHGCLKREQ); in stm32mp2_a35_ss_on_bypass()
1324 if (!(stm32mp_syscfg_read(CA35SS_SSC_CHGCLKREQ) & in stm32mp2_a35_ss_on_bypass()
1327 if (stm32mp_syscfg_read(CA35SS_SSC_CHGCLKREQ) & in stm32mp2_a35_ss_on_bypass()
1338 if (stm32mp_syscfg_read(CA35SS_SSC_CHGCLKREQ) & in stm32mp2_a35_ss_on_bypass()
1342 if (!(stm32mp_syscfg_read(CA35SS_SSC_CHGCLKREQ) & in stm32mp2_a35_ss_on_bypass()
1372 if (stm32mp_syscfg_read(CA35SS_SSC_PLL_EN) & in stm32mp2_a35_pll1_start()
1376 if (!(stm32mp_syscfg_read(CA35SS_SSC_PLL_EN) & in stm32mp2_a35_pll1_start()
1395 if (!(stm32mp_syscfg_read(CA35SS_SSC_CHGCLKREQ) & in stm32mp2_a35_pll1_start()
1399 if (stm32mp_syscfg_read(CA35SS_SSC_CHGCLKREQ) & in stm32mp2_a35_pll1_start()
2066 uint32_t reg = stm32mp_syscfg_read(CA35SS_SSC_PLL_FREQ1); in clk_get_pll1_fvco_rate()
[all …]