| #
d8bfc12a |
| 25-Apr-2025 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
plat: stm32mp2: sysconf: fix CA35SS register names
Align register names with the reference manuel for Arm Cortex-A35 (CA35SS)
- CA35SS SYSCFG registers (with 0x2000 offset)
- CA35SS Standardized sta
plat: stm32mp2: sysconf: fix CA35SS register names
Align register names with the reference manuel for Arm Cortex-A35 (CA35SS)
- CA35SS SYSCFG registers (with 0x2000 offset)
- CA35SS Standardized status and control (SSC) registers
This path removes the confusion between SSC and subsystem (SS).
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Co-developed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
fcbd9ef9 |
| 25-Apr-2025 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
plat-stm32mp2: sysconfig: fix ordering of SYSCFG defines
Reorder SYSCFG defines to prepare renaming so the defines use the same
name as the one in the reference manual.
Signed-off-by: Thomas Bourgo
plat-stm32mp2: sysconfig: fix ordering of SYSCFG defines
Reorder SYSCFG defines to prepare renaming so the defines use the same
name as the one in the reference manual.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
7b8c7554 |
| 03-Jun-2025 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
clk: stm32mp25: force ARM_DIVSEL for flexgen63 config at 400MHz
When clkext2f is selected as the clock source, a division by 2
must be applied to the SSC register (A3x_SS_CHGCLKREQ.ARM_DIVSEL)
becau
clk: stm32mp25: force ARM_DIVSEL for flexgen63 config at 400MHz
When clkext2f is selected as the clock source, a division by 2
must be applied to the SSC register (A3x_SS_CHGCLKREQ.ARM_DIVSEL)
because the clkext2f frequency of 400MHz is not supported.
This patch also rename the function stm32mp2_a35_ss_on_hsi to
stm32mp2_a35_ss_on_bypass to be aligned with reference manual.
Fixes: 28c10f9efa6a ("clk: stm32mp25: Introduce STM32MP25 clocks platform")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| #
22c24182 |
| 21-May-2025 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp2: sysconfig: add OSPIs address mapping
This patch adds an API to handle OSPIs address mapping.
The different configurations are:
- OSPI1(256 MBytes), OSPI2(unmapped)
- OSPI1(192 MByte
plat-stm32mp2: sysconfig: add OSPIs address mapping
This patch adds an API to handle OSPIs address mapping.
The different configurations are:
- OSPI1(256 MBytes), OSPI2(unmapped)
- OSPI1(192 MBytes), OSPI2(64 MBytes)
- OSPI1(128 MBytes), OSPI2(128 MBytes)
- OSPI1(64 MBytes), OSPI2(192 MBytes)
- OSPI1(unmapped), OSPI2(256 MBytes).
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
60c093a0 |
| 01-Oct-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp2: add VDERAM SYSCFG support
Adds support for the VDERAM configuration that is present in SYSCFG.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne C
plat-stm32mp2: add VDERAM SYSCFG support
Adds support for the VDERAM configuration that is present in SYSCFG.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
9b87942a |
| 03-Jun-2024 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
plat-stm32mp2: sysconfig: add Safe Reset functionality
Add possibility to manage safely master IP reset.
This is managed in SYSCFG safe reset control register (SYSCFG_SAFERSTCR)
Signed-off-by: Gabr
plat-stm32mp2: sysconfig: add Safe Reset functionality
Add possibility to manage safely master IP reset.
This is managed in SYSCFG safe reset control register (SYSCFG_SAFERSTCR)
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
ef7785ad |
| 17-Mar-2022 |
Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> |
plat-stm32mp2: add stm32mp25 sysconfig driver
Driver to manage system configuration (sysconf) registers
the sysconf are identified by an ID to be able to be adapted for DT.
Signed-off-by: Arnaud Po
plat-stm32mp2: add stm32mp25 sysconfig driver
Driver to manage system configuration (sysconf) registers
the sysconf are identified by an ID to be able to be adapted for DT.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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