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Searched refs:pllxcfgr1 (Results 1 – 3 of 3) sorted by relevance

/optee_os/core/drivers/clk/
H A Dclk-stm32mp21.c1413 uintptr_t pllxcfgr1 = priv->base + pll->reg_pllxcfgr1; in clk_stm32_pll_config_output() local
1414 uintptr_t pllxcfgr2 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR2; in clk_stm32_pll_config_output()
1415 uintptr_t pllxcfgr3 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR3; in clk_stm32_pll_config_output()
1416 uintptr_t pllxcfgr4 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR4; in clk_stm32_pll_config_output()
1417 uintptr_t pllxcfgr6 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR6; in clk_stm32_pll_config_output()
1418 uintptr_t pllxcfgr7 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR7; in clk_stm32_pll_config_output()
1436 io_setbits32(pllxcfgr1, RCC_PLLxCFGR1_SSMODRST); in clk_stm32_pll_config_output()
1479 uintptr_t pllxcfgr1 = priv->base + pll->reg_pllxcfgr1; in clk_stm32_pll_config_csg() local
1480 uintptr_t pllxcfgr3 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR3; in clk_stm32_pll_config_csg()
1481 uintptr_t pllxcfgr4 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR4; in clk_stm32_pll_config_csg()
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H A Dclk-stm32mp25.c1431 uintptr_t pllxcfgr1 = priv->base + pll->reg_pllxcfgr1; in clk_stm32_pll_config_output() local
1432 uintptr_t pllxcfgr2 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR2; in clk_stm32_pll_config_output()
1433 uintptr_t pllxcfgr3 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR3; in clk_stm32_pll_config_output()
1434 uintptr_t pllxcfgr4 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR4; in clk_stm32_pll_config_output()
1435 uintptr_t pllxcfgr6 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR6; in clk_stm32_pll_config_output()
1436 uintptr_t pllxcfgr7 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR7; in clk_stm32_pll_config_output()
1454 io_setbits32(pllxcfgr1, RCC_PLLxCFGR1_SSMODRST); in clk_stm32_pll_config_output()
1497 uintptr_t pllxcfgr1 = priv->base + pll->reg_pllxcfgr1; in clk_stm32_pll_config_csg() local
1498 uintptr_t pllxcfgr3 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR3; in clk_stm32_pll_config_csg()
1499 uintptr_t pllxcfgr4 = pllxcfgr1 + RCC_OFFSET_PLLXCFGR4; in clk_stm32_pll_config_csg()
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H A Dclk-stm32mp15.c220 uint16_t pllxcfgr1; member
318 .pllxcfgr1 = (_off2), \
684 cfgr1 = io_read32(stm32_rcc_base() + pll->pllxcfgr1); in stm32mp1_pll_get_fvco()