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Searched refs:RCC_APB1DIVR (Results 1 – 8 of 8) sorted by relevance

/optee_os/core/include/drivers/
H A Dstm32mp1_rcc.h116 #define RCC_APB1DIVR 0x834 macro
H A Dstm32mp21_rcc.h275 #define RCC_APB1DIVR U(0x4AC) macro
H A Dstm32mp13_rcc.h66 #define RCC_APB1DIVR U(0x570) macro
H A Dstm32mp25_rcc.h296 #define RCC_APB1DIVR U(0x4B4) macro
/optee_os/core/drivers/clk/
H A Dclk-stm32mp15.c834 reg = io_read32(rcc_base + RCC_APB1DIVR); in get_clock_rate()
974 apbxdiv = io_read32(rcc_base + RCC_APB1DIVR) & in get_timer_rate()
H A Dclk-stm32mp13.c299 GATE_CFG(GATE_APB1DIVRDY, RCC_APB1DIVR, 31, 0),
547 DIVRDY_CFG(DIV_APB1, RCC_APB1DIVR, 0, 3, 0, apb_div_table,
2182 static STM32_TIMER(ck_timg1, &ck_pclk1, 0, RCC_APB1DIVR, RCC_TIMG1PRER);
H A Dclk-stm32mp21.c426 GATE_CFG(GATE_APB1DIV_RDY, RCC_APB1DIVR, 31, 0),
623 _DIV_CFG(DIV_APB1, RCC_APB1DIVR, 0, 3, 0, apb_div_table,
2779 static STM32_TIMER(ck_timg1, &ck_icn_apb1, 0, RCC_APB1DIVR, RCC_TIMG1PRER);
H A Dclk-stm32mp25.c427 GATE_CFG(GATE_APB1DIV_RDY, RCC_APB1DIVR, 31, 0),
663 _DIV_CFG(DIV_APB1, RCC_APB1DIVR, 0, 3, 0, apb_div_table,
2771 static STM32_TIMER(ck_timg1, &ck_icn_apb1, 0, RCC_APB1DIVR, RCC_TIMG1PRER);