Home
last modified time | relevance | path

Searched refs:CA35SS_SSC_PLL_FREQ2 (Results 1 – 3 of 3) sorted by relevance

/optee_os/core/arch/arm/plat-stm32mp2/
H A Dstm32_sysconf.h40 #define CA35SS_SSC_PLL_FREQ2 SYSCON_ID(SYSCON_CA35SS, 0x90U) macro
/optee_os/core/drivers/clk/
H A Dclk-stm32mp21.c1399 stm32mp_syscfg_write(CA35SS_SSC_PLL_FREQ2, in stm32mp2_a35_pll1_config()
2093 uint32_t reg = stm32mp_syscfg_read(CA35SS_SSC_PLL_FREQ2); in clk_stm32_pll1_get_rate()
H A Dclk-stm32mp25.c1417 stm32mp_syscfg_write(CA35SS_SSC_PLL_FREQ2, in stm32mp2_a35_pll1_config()
2086 uint32_t reg = stm32mp_syscfg_read(CA35SS_SSC_PLL_FREQ2); in clk_stm32_pll1_get_rate()