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Searched refs:CA35SS_SSC_PLL_FREQ1 (Results 1 – 3 of 3) sorted by relevance

/optee_os/core/arch/arm/plat-stm32mp2/
H A Dstm32_sysconf.h39 #define CA35SS_SSC_PLL_FREQ1 SYSCON_ID(SYSCON_CA35SS, 0x80U) macro
/optee_os/core/drivers/clk/
H A Dclk-stm32mp21.c1393 stm32mp_syscfg_write(CA35SS_SSC_PLL_FREQ1, in stm32mp2_a35_pll1_config()
2073 uint32_t reg = stm32mp_syscfg_read(CA35SS_SSC_PLL_FREQ1); in clk_get_pll1_fvco_rate()
H A Dclk-stm32mp25.c1411 stm32mp_syscfg_write(CA35SS_SSC_PLL_FREQ1, in stm32mp2_a35_pll1_config()
2066 uint32_t reg = stm32mp_syscfg_read(CA35SS_SSC_PLL_FREQ1); in clk_get_pll1_fvco_rate()