Searched refs:tegra_pll_info_table (Results 1 – 10 of 10) sorted by relevance
94 struct clk_pll_info *pllinfo = &tegra_pll_info_table[clkid]; in clock_ll_read_pll()118 struct clk_pll_info *pllinfo = &tegra_pll_info_table[clkid]; in clock_start_pll()538 struct clk_pll_info *pllinfo = &tegra_pll_info_table[clkid]; in clock_get_rate()593 struct clk_pll_info *pllinfo = &tegra_pll_info_table[clkid]; in clock_set_rate()
174 struct clk_pll_info *pllinfo = &tegra_pll_info_table[CLOCK_ID_XCPU]; in pllx_set_rate()
431 struct clk_pll_info tegra_pll_info_table[CLOCK_ID_PLL_COUNT] = { variable665 pllinfo = &tegra_pll_info_table[CLOCK_ID_CGENERAL]; in clock_early_init()702 pllinfo = &tegra_pll_info_table[CLOCK_ID_CGENERAL]; in clock_early_init()707 pllinfo = &tegra_pll_info_table[CLOCK_ID_DISPLAY]; in clock_early_init()
55 struct clk_pll_info *pllinfo = &tegra_pll_info_table[CLOCK_ID_XCPU]; in enable_cpu_clocks()
406 extern struct clk_pll_info tegra_pll_info_table[CLOCK_ID_PLL_COUNT];
571 struct clk_pll_info tegra_pll_info_table[CLOCK_ID_PLL_COUNT] = { variable845 pllinfo = &tegra_pll_info_table[CLOCK_ID_CGENERAL]; in clock_early_init()882 pllinfo = &tegra_pll_info_table[CLOCK_ID_CGENERAL]; in clock_early_init()887 pllinfo = &tegra_pll_info_table[CLOCK_ID_DISPLAY]; in clock_early_init()
48 struct clk_pll_info *pllinfo = &tegra_pll_info_table[CLOCK_ID_XCPU]; in enable_cpu_clocks()
642 struct clk_pll_info tegra_pll_info_table[CLOCK_ID_PLL_COUNT] = { variable974 struct clk_pll_info *pllinfo = &tegra_pll_info_table[CLOCK_ID_DISPLAY]; in clock_early_init()
362 struct clk_pll_info tegra_pll_info_table[CLOCK_ID_PLL_COUNT] = { variable
411 struct clk_pll_info tegra_pll_info_table[CLOCK_ID_PLL_COUNT] = { variable