| /OK3568_Linux_fs/kernel/drivers/media/pci/cx18/ |
| H A D | cx18-irq.c | 15 static void xpu_ack(struct cx18 *cx, u32 sw2) in xpu_ack() argument
17 if (sw2 & IRQ_CPU_TO_EPU_ACK) in xpu_ack()
19 if (sw2 & IRQ_APU_TO_EPU_ACK) in xpu_ack()
34 u32 sw1, sw2, hw2; in cx18_irq_handler() local
37 sw2 = cx18_read_reg(cx, SW2_INT_STATUS) & cx->sw2_irq_mask; in cx18_irq_handler()
42 if (sw2) in cx18_irq_handler()
43 cx18_write_reg_expect(cx, sw2, SW2_INT_STATUS, ~sw2, sw2); in cx18_irq_handler()
47 if (sw1 || sw2 || hw2) in cx18_irq_handler()
49 sw1, sw2, hw2); in cx18_irq_handler()
63 if (sw2) in cx18_irq_handler()
[all …]
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| /OK3568_Linux_fs/u-boot/board/freescale/corenet_ds/ |
| H A D | eth_hydra.c | 291 u8 sw2 = in_8(&PIXIS_SW(2)); in initialize_lane_to_slot() local
293 lane_to_slot[2] = (sw2 & PIXIS_SW2_LANE_23_SEL) ? 7 : 4; in initialize_lane_to_slot()
296 lane_to_slot[4] = (sw2 & PIXIS_SW2_LANE_45_SEL) ? 7 : 6; in initialize_lane_to_slot()
299 switch (sw2 & PIXIS_SW2_LANE_67_SEL_MASK) { in initialize_lane_to_slot()
312 lane_to_slot[8] = (sw2 & PIXIS_SW2_LANE_8_SEL) ? 3 : 0; in initialize_lane_to_slot()
314 lane_to_slot[16] = (sw2 & PIXIS_SW2_LANE_1617_SEL) ? 1 : 0; in initialize_lane_to_slot()
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| H A D | eth_superhydra.c | 253 u8 sw2 = in_8(&PIXIS_SW(2)); in initialize_lane_to_slot() local
257 lane_to_slot[2] = (sw2 & PIXIS_SW2_LANE_23_SEL) ? 7 : 4; in initialize_lane_to_slot()
260 lane_to_slot[4] = (sw2 & PIXIS_SW2_LANE_45_SEL) ? 7 : 6; in initialize_lane_to_slot()
263 switch (sw2 & PIXIS_SW2_LANE_67_SEL_MASK) { in initialize_lane_to_slot()
276 lane_to_slot[8] = (sw2 & PIXIS_SW2_LANE_8_SEL) ? 3 : 0; in initialize_lane_to_slot()
279 lane_to_slot[16] = (sw2 & PIXIS_SW2_LANE_1617_SEL) ? 1 : 0; in initialize_lane_to_slot()
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/regulator/ |
| H A D | ltc3676.txt | 8 - regulators: Contains eight regulator child nodes sw1, sw2, sw3, sw4,
13 nodes for sw1, sw2, sw3, sw4, ldo1, ldo2 and ldo4 additionally need to specify
20 Regulators sw1, sw2, sw3, sw4 can regulate the feedback reference from:
45 sw2_reg: sw2 {
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| H A D | ltc3589.txt | 8 - regulators: Contains eight regulator child nodes sw1, sw2, sw3, bb-out,
13 nodes for sw1, sw2, sw3, bb-out, ldo1, and ldo2 additionally need to specify
20 Regulators sw1, sw2, sw3, and ldo2 can regulate the feedback reference from
45 sw2_reg: sw2 {
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| H A D | pv88060.txt | 91 regulator-name = "sw2";
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| /OK3568_Linux_fs/kernel/drivers/media/i2c/ |
| H A D | m52790.c | 44 u8 sw2 = (state->input | state->output) >> 8; in m52790_write() local
46 return i2c_smbus_write_byte_data(client, sw1, sw2); in m52790_write()
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| /OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/ |
| H A D | dib0090.h | 87 extern int dib0090_set_switch(struct dvb_frontend *fe, u8 sw1, u8 sw2, u8 sw3);
157 u8 sw1, u8 sw2, u8 sw3) in dib0090_set_switch() argument
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| /OK3568_Linux_fs/u-boot/drivers/power/regulator/ |
| H A D | pfuze100.c | 164 PFUZE100_SW_REG(sw2, PFUZE100_SW2VOL, 25000),
182 PFUZE100_SW_REG(sw2, PFUZE100_SW2VOL, 25000),
200 PFUZE100_SWB_REG(sw2, PFUZE100_SW2VOL, 0x7, 50000, pfuze3000_sw2lo),
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | sun8i-h3-orangepi-2.dts | 94 sw2 {
95 label = "sw2";
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| H A D | imx6sx-sdb.dts | 30 sw2_reg: sw2 {
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| H A D | imx53-qsrb.dts | 50 sw2_reg: sw2 {
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| H A D | imx6qdl-wandboard-revd1.dtsi | 51 sw2_reg: sw2 {
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| H A D | imx6sx-sdb-reva.dts | 39 sw2_reg: sw2 {
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| H A D | imx6qdl-tqma6.dtsi | 103 reg_gen_3v3: sw2 {
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| H A D | qcom-ipq8064-rb3011.dts | 73 label = "sw2";
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| H A D | imx7-tqma7.dtsi | 52 sw2_reg: sw2 {
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| H A D | imx6ul-ccimx6ulsom.dtsi | 75 ext_3v3: sw2 {
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| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | sun8i-h3-orangepi-2.dts | 87 sw2 {
88 label = "sw2";
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| /OK3568_Linux_fs/kernel/arch/mips/boot/dts/qca/ |
| H A D | ar9331_tl_mr3020.dts | 68 label = "sw2";
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| /OK3568_Linux_fs/kernel/arch/mips/boot/dts/pic32/ |
| H A D | pic32mzda_sk.dts | 64 button@sw2 {
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| /OK3568_Linux_fs/external/mpp/mpp/hal/vpu/vp8e/ |
| H A D | hal_vp8e_vepu1_v2.c | 50 regs->sw2.val = 0xd00f; in vp8e_vpu_frame_start()
53 regs->sw2.val = 0xd00f; in vp8e_vpu_frame_start()
55 regs->sw2.val = 0x900e; in vp8e_vpu_frame_start()
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| H A D | hal_vp8e_vepu1_reg.h | 31 } sw2; member
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3326-odroid-go2.dts | 39 * | sw2 | LCD Display | sw6 |
51 sw2 {
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mq-sr-som.dtsi | 60 sw2_reg: sw2 {
|