Searched refs:pdr0 (Results 1 – 7 of 7) sorted by relevance
69 static u32 get_arm_div(u32 pdr0, u32 *fi, u32 *fd) in get_arm_div() argument72 if (pdr0 & MXC_CCM_PDR0_AUTO_CON) { in get_arm_div()74 ((pdr0 & MXC_CCM_PDR0_CON_MUX_DIV_MASK) >> in get_arm_div()78 ((pdr0 & MXC_CCM_PDR0_AUTO_MUX_DIV_MASK) >> in get_arm_div()90 if (pdr0 & MXC_CCM_PDR0_AUTO_CON) { in get_arm_div()101 static int get_ahb_div(u32 pdr0) in get_ahb_div() argument106 ((pdr0 & MXC_CCM_PDR0_CON_MUX_DIV_MASK) >> in get_ahb_div()136 arm_div = get_arm_div(readl(&ccm->pdr0), &fi, &fd); in get_mcu_main_clk()146 u32 pdr0 = readl(&ccm->pdr0); in get_ipg_clk() local148 return freq / (get_ahb_div(pdr0) * 2); in get_ipg_clk()[all …]
54 u32 pdr0 = readl(CCM_PDR0); in mx31_get_ipg_clk() local56 freq /= GET_PDR0_MAX_PODF(pdr0) + 1; in mx31_get_ipg_clk()57 freq /= GET_PDR0_IPG_PODF(pdr0) + 1; in mx31_get_ipg_clk()66 u32 pdr0 = readl(CCM_PDR0); in mx31_get_hsp_clk() local68 freq /= GET_PDR0_HSP_PODF(pdr0) + 1; in mx31_get_hsp_clk()
88 u32 pdr0, consumer_sel, hsp_sel; in _mx35_clocks_init() local95 pdr0 = __raw_readl(base + MXC_CCM_PDR0); in _mx35_clocks_init()96 consumer_sel = (pdr0 >> 16) & 0xf; in _mx35_clocks_init()124 hsp_sel = (pdr0 >> 20) & 0x3; in _mx35_clocks_init()
149 writel(0x00001000, &ccm->pdr0); in board_early_init_f()
211 u32 pdr0; /* Post divider 0 */ member
104 DEFINE(CLKCTL_PDR0, offsetof(struct ccm_regs, pdr0)); in main()
16 u32 pdr0; member