Searched refs:m_cmd (Results 1 – 7 of 7) sorted by relevance
173 u32 m_cmd = 0; in amd_spi_fifo_xfer() local180 m_cmd = AMD_SPI_XFER_RX; in amd_spi_fifo_xfer()182 m_cmd = AMD_SPI_XFER_TX; in amd_spi_fifo_xfer()184 if (m_cmd & AMD_SPI_XFER_TX) { in amd_spi_fifo_xfer()203 if (m_cmd & AMD_SPI_XFER_RX) { in amd_spi_fifo_xfer()
487 u32 m_cmd = 0; in setup_fifo_xfer() local528 m_cmd |= SPI_TX_ONLY; in setup_fifo_xfer()534 m_cmd |= SPI_RX_ONLY; in setup_fifo_xfer()544 geni_se_setup_m_cmd(se, m_cmd, FRAGMENTATION); in setup_fifo_xfer()551 if (m_cmd & SPI_TX_ONLY) { in setup_fifo_xfer()
237 u32 m_cmd = 0; in msm_geni_serial_setup_tx() local240 m_cmd |= (UART_START_TX << M_OPCODE_SHFT); in msm_geni_serial_setup_tx()241 writel_relaxed(m_cmd, uport->membase + SE_GENI_M_CMD0); in msm_geni_serial_setup_tx()
307 u32 m_cmd; in qcom_geni_serial_setup_tx() local310 m_cmd = UART_START_TX << M_OPCODE_SHFT; in qcom_geni_serial_setup_tx()311 writel(m_cmd, uport->membase + SE_GENI_M_CMD0); in qcom_geni_serial_setup_tx()
299 u32 m_cmd; in geni_se_setup_m_cmd() local301 m_cmd = (cmd << M_OPCODE_SHFT) | (params & M_PARAMS_MSK); in geni_se_setup_m_cmd()302 writel(m_cmd, se->base + SE_GENI_M_CMD0); in geni_se_setup_m_cmd()
37 QString m_cmd; variable
170 u32 m_cmd = readl_relaxed(gi2c->se.base + SE_GENI_M_CMD0); in geni_i2c_err_misc() local187 m_cmd, geni_s, geni_ios); in geni_i2c_err_misc()