| /OK3568_Linux_fs/kernel/Documentation/arm64/ |
| H A D | legacy_instructions.rst | 2 Legacy instructions
6 emulation of instructions which have been deprecated, or obsoleted in
18 Generates undefined instruction abort. Default for instructions that
27 instructions, .e.g., CP15 barriers
34 instructions. Using hardware execution generally provides better
36 about the use of the deprecated instructions.
39 architecture. Deprecated instructions should default to emulation
40 while obsolete instructions must be undefined by default.
45 Supported legacy instructions
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| H A D | pointer-authentication.rst | 25 The extension adds instructions to insert a valid PAC into a pointer,
30 A subset of these instructions have been allocated from the HINT
32 these instructions behave as NOPs. Applications and libraries using
33 these instructions operate correctly regardless of the presence of the
58 uses instructions in the HINT space (unless -march=armv8.3-a or higher
108 register. Any attempt to use the Pointer Authentication instructions will
129 instructions to sign and authenticate function pointers and other pointers
136 but before executing any PAC instructions.
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| /OK3568_Linux_fs/kernel/drivers/watchdog/ |
| H A D | wdat_wdt.c | 47 struct list_head *instructions[MAX_WDAT_ACTIONS]; member
119 if (action >= ARRAY_SIZE(wdat->instructions)) in wdat_wdt_run_action()
122 if (!wdat->instructions[action]) in wdat_wdt_run_action()
128 list_for_each_entry(instr, wdat->instructions[action], node) { in wdat_wdt_run_action()
377 struct list_head *instructions; in wdat_wdt_probe() local
424 instructions = wdat->instructions[action]; in wdat_wdt_probe()
425 if (!instructions) { in wdat_wdt_probe()
426 instructions = devm_kzalloc(dev, in wdat_wdt_probe()
427 sizeof(*instructions), in wdat_wdt_probe()
429 if (!instructions) in wdat_wdt_probe()
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| /OK3568_Linux_fs/u-boot/doc/ |
| H A D | README.NDS32 | 13 - 16-bit instructions as a frequently used subset of 32-bit instructions.
17 instructions.
18 - Rich load/store instructions for...
23 - Non-bus locking synchronization instructions.
24 - PC relative jump and PC read instructions for efficient position independent
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| /OK3568_Linux_fs/kernel/Documentation/bpf/ |
| H A D | bpf_design_QA.rst | 93 It's the maximum number of instructions that the unprivileged bpf
95 Like the maximum number of instructions that can be explored during
98 of 1 million NOP instructions. There is a limit to the maximum number
119 Q: LD_ABS and LD_IND instructions vs C code
129 Q: BPF instructions mapping not one-to-one to native CPU
131 Q: It seems not all BPF instructions are one-to-one to native CPU.
154 of LD_ABS insn). Those instructions need to invoke epilogue and
157 Q: Why BPF_JLT and BPF_JLE instructions were not introduced in the beginning?
161 due to lack of these compare instructions and they were added.
162 These two instructions is a perfect example what kind of new BPF
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| /OK3568_Linux_fs/kernel/tools/perf/Documentation/ |
| H A D | itrace.txt | 1 i synthesize instructions events
27 for instructions events can be specified in units of:
29 i instructions
35 Also the call chain size (default 16, max. 1024) for instructions or
39 instructions or transactions events can be specified.
45 It is also possible to skip events generated (instructions, branches, transactions,
50 skips the first million instructions.
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| /OK3568_Linux_fs/kernel/arch/arm64/crypto/ |
| H A D | Kconfig | 8 implemented using ARM64 specific CPU features or instructions.
65 tristate "CRCT10DIF digest algorithm using PMULL instructions"
70 tristate "AES core cipher using scalar instructions"
94 tristate "AES in ECB/CBC/CTR/XTS modes using NEON instructions"
100 tristate "ChaCha20, XChaCha20, and XChaCha12 stream ciphers using NEON instructions"
107 tristate "Poly1305 hash function using scalar or NEON instructions"
113 tristate "NHPoly1305 hash function using NEON instructions (for Adiantum)"
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| /OK3568_Linux_fs/kernel/Documentation/x86/x86_64/ |
| H A D | fsgs.rst | 69 Accessing FS/GS base with the FSGSBASE instructions
73 instructions to access the FS and GS base registers directly from user
74 space. These instructions are also supported on AMD Family 17H CPUs. The
75 following instructions are available:
84 The instructions avoid the overhead of the arch_prctl() syscall and allow
90 FSGSBASE instructions enablement
92 The instructions are enumerated in CPUID leaf 7, bit 0 of EBX. If
95 The availability of the instructions does not enable them
103 instructions will fault with a #UD exception.
107 kernel has FSGSBASE instructions enabled and applications can use them.
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| /OK3568_Linux_fs/kernel/Documentation/arm/ |
| H A D | kernel_mode_neon.rst | 7 * Use only NEON instructions, or VFP instructions that don't rely on support
19 It is possible to use NEON instructions (and in some cases, VFP instructions) in
24 may call schedule()], as NEON or VFP instructions will be executed in a
43 should be called before any kernel mode NEON or VFP instructions are issued.
74 Such software assistance is currently not implemented for VFP instructions
82 kernel_neon_end(), i.e., that it is only allowed to issue NEON/VFP instructions
84 instructions of its own at -O3 level if -mfpu=neon is selected, and even if the
86 instructions appearing in unexpected places if no special care is taken.
98 both NEON and VFP instructions will only ever appear in designated compilation
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| H A D | swp_emulation.rst | 4 ARMv6 architecture deprecates use of the SWP/SWPB instructions, and recommeds
5 moving to the load-locked/store-conditional instructions LDREX and STREX.
8 instructions, triggering an undefined instruction exception when executed.
9 Trapped instructions are emulated using an LDREX/STREX or LDREXB/STREXB
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| /OK3568_Linux_fs/kernel/tools/testing/selftests/powerpc/pmu/ |
| H A D | count_instructions.c | 29 static int do_count_loop(struct event *events, u64 instructions, in do_count_loop() argument
38 thirty_two_instruction_loop(instructions >> 5); in do_count_loop()
45 expected = instructions + overhead; in do_count_loop()
53 printf("Looped for %llu instructions, overhead %llu\n", instructions, overhead); in do_count_loop()
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| H A D | count_stcx_fail.c | 29 static int do_count_loop(struct event *events, u64 instructions, in do_count_loop() argument
39 thirty_two_instruction_loop_with_ll_sc(instructions >> 5, &dummy); in do_count_loop()
47 expected = instructions + overhead + (events[2].result.value * 10); in do_count_loop()
57 printf("Looped for %llu instructions, overhead %llu\n", instructions, overhead); in do_count_loop()
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| /OK3568_Linux_fs/kernel/tools/testing/selftests/powerpc/pmu/ebb/ |
| H A D | instruction_count_test.c | 25 static int do_count_loop(struct event *event, uint64_t instructions, in do_count_loop() argument
37 thirty_two_instruction_loop(instructions >> 5); in do_count_loop()
46 expected = instructions + overhead; in do_count_loop()
51 printf("Looped for %lu instructions, overhead %lu\n", instructions, overhead); in do_count_loop()
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| /OK3568_Linux_fs/kernel/Documentation/virt/kvm/ |
| H A D | ppc-pv.rst | 9 instructions and can emulate them accordingly.
12 instructions that needlessly return us to the hypervisor even though they
15 This is what the PPC PV interface helps with. It takes privileged instructions
35 'hypercall-instructions'. This property contains at most 4 opcodes that make
36 up the hypercall. To call a hypercall, just call these instructions.
138 Patched instructions
141 The "ld" and "std" instructions are transformed to "lwz" and "stw" instructions
147 also act on the shared page. So calling privileged instructions still works as
187 Some instructions require more logic to determine what's going on than a load
189 RAM around where we can live translate instructions to. What happens is the
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| /OK3568_Linux_fs/kernel/tools/memory-model/ |
| H A D | linux-kernel.bell | 20 instructions R[{'once,'acquire,'noreturn}]
21 instructions W[{'once,'release}]
22 instructions RMW[{'once,'acquire,'release}]
35 instructions F[Barriers]
39 instructions SRCU[SRCU]
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| /OK3568_Linux_fs/kernel/arch/arm/crypto/ |
| H A D | Kconfig | 8 implemented using ARM specific CPU features or instructions.
28 using optimized ARM NEON assembly, when NEON instructions are
69 BLAKE2s digest algorithm optimized with ARM scalar instructions. This
79 BLAKE2b digest algorithm optimized with ARM NEON instructions.
101 tristate "Bit sliced AES using NEON instructions"
141 tristate "CRCT10DIF digest algorithm using PMULL instructions"
147 tristate "CRC32(C) digest algorithm using CRC and/or PMULL instructions"
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| /OK3568_Linux_fs/kernel/tools/perf/tests/attr/ |
| H A D | README | 50 perf record --group -e cycles,instructions kill (test-record-group)
51 perf record -e '{cycles,instructions}' kill (test-record-group1)
52 perf record -e '{cycles/period=1/,instructions/period=2/}:S' kill (test-record-group2)
64 perf stat --group -e cycles,instructions kill (test-stat-group)
65 perf stat -e '{cycles,instructions}' kill (test-stat-group1)
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| /OK3568_Linux_fs/u-boot/board/ti/ks2_evm/ |
| H A D | README | 74 Build instructions:
87 on EVM. See instructions at below link for installing CCS on a Windows PC.
91 on EVM. Follow instructions at
98 and Power ON the EVM. Follow instructions to connect serial port of EVM to
104 The instructions provided in the above link uses a script for
132 SPI NOR Flash programming instructions
135 instructions:
153 AEMIF NAND Flash programming instructions
156 instructions:
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| /OK3568_Linux_fs/yocto/poky/meta/conf/machine/include/arm/ |
| H A D | feature-arm-crc.inc | 1 # Cyclic Redundancy Check (CRC) instructions for armv8-a and armv8-r
3 TUNEVALID[crc] = "Enable instructions for ARMv8 Cyclic Redundancy Check (CRC)"
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| H A D | feature-arm-crypto.inc | 1 # Cryptographic instructions for:
4 TUNEVALID[crypto] = "Enable cryptographic instructions for ARMv8"
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| H A D | feature-arm-simd.inc | 1 # Advanced SIMD and floating-point instructions for armv7-a, armv7ve,
4 TUNEVALID[simd] = "Enable instructions for Advanced SIMD and floating-point units"
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| /OK3568_Linux_fs/kernel/Documentation/virt/ |
| H A D | paravirt_ops.rst | 16 corresponding to low level critical instructions and high level
28 Usually these operations correspond to low level critical instructions. They
34 because they include sensitive instructions or some of code paths in
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| /OK3568_Linux_fs/yocto/meta-openembedded/meta-multimedia/recipes-multimedia/tremor/tremor/ |
| H A D | tremor-arm-thumb2.patch | 3 Subject: [PATCH] tremor: add IT instructions for arm thumb2 tune flags.
7 In Thumb-2, most instructions do not have a built in condition code (except for
8 conditional branches). Instead, short sequences of instructions which are to be
10 describes the condition and which of the following instructions should be
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| /OK3568_Linux_fs/kernel/arch/nios2/platform/ |
| H A D | Kconfig.platform | 53 comment "Nios II instructions"
82 bool "Enable BMX instructions"
86 the BMX Bit Manipulation Extension instructions. Enables
90 bool "Enable CDX instructions"
94 the CDX Bit Manipulation Extension instructions. Enables
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| /OK3568_Linux_fs/kernel/arch/m68k/ifpsp060/ |
| H A D | fplsp.doc | 36 FP instructions not implemented in 68060 hardware. These
37 instructions normally take exception vector #11
40 By re-compiling a program that uses these instructions, and
42 instructions, a program can avoid the overhead associated
110 this exception using implemented floating-point instructions.
120 The package does not attempt to correctly emulate instructions
126 subroutine calls for all fp instructions. The code does NOT emulate
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