1*4882a593SmuzhiyunSoftware emulation of deprecated SWP instruction (CONFIG_SWP_EMULATE) 2*4882a593Smuzhiyun--------------------------------------------------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunARMv6 architecture deprecates use of the SWP/SWPB instructions, and recommeds 5*4882a593Smuzhiyunmoving to the load-locked/store-conditional instructions LDREX and STREX. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunARMv7 multiprocessing extensions introduce the ability to disable these 8*4882a593Smuzhiyuninstructions, triggering an undefined instruction exception when executed. 9*4882a593SmuzhiyunTrapped instructions are emulated using an LDREX/STREX or LDREXB/STREXB 10*4882a593Smuzhiyunsequence. If a memory access fault (an abort) occurs, a segmentation fault is 11*4882a593Smuzhiyunsignalled to the triggering process. 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/proc/cpu/swp_emulation holds some statistics/information, including the PID of 14*4882a593Smuzhiyunthe last process to trigger the emulation to be invocated. For example:: 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun Emulated SWP: 12 17*4882a593Smuzhiyun Emulated SWPB: 0 18*4882a593Smuzhiyun Aborted SWP{B}: 1 19*4882a593Smuzhiyun Last process: 314 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunNOTE: 23*4882a593Smuzhiyun when accessing uncached shared regions, LDREX/STREX rely on an external 24*4882a593Smuzhiyun transaction monitoring block called a global monitor to maintain update 25*4882a593Smuzhiyun atomicity. If your system does not implement a global monitor, this option can 26*4882a593Smuzhiyun cause programs that perform SWP operations to uncached memory to deadlock, as 27*4882a593Smuzhiyun the STREX operation will always fail. 28