xref: /OK3568_Linux_fs/kernel/arch/nios2/platform/Kconfig.platform (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyunmenu "Platform options"
3*4882a593Smuzhiyun
4*4882a593Smuzhiyuncomment "Memory settings"
5*4882a593Smuzhiyun
6*4882a593Smuzhiyunconfig NIOS2_MEM_BASE
7*4882a593Smuzhiyun	hex "Memory base address"
8*4882a593Smuzhiyun	default "0x00000000"
9*4882a593Smuzhiyun	help
10*4882a593Smuzhiyun	  This is the physical address of the memory that the kernel will run
11*4882a593Smuzhiyun	  from. This address is used to link the kernel and setup initial memory
12*4882a593Smuzhiyun	  management. You should take the raw memory address without any MMU
13*4882a593Smuzhiyun	  or cache bits set.
14*4882a593Smuzhiyun	  Please not that this address is used directly so you have to manually
15*4882a593Smuzhiyun	  do address translation if it's connected to a bridge.
16*4882a593Smuzhiyun
17*4882a593Smuzhiyuncomment "Device tree"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyunconfig NIOS2_DTB_AT_PHYS_ADDR
20*4882a593Smuzhiyun	bool "DTB at physical address"
21*4882a593Smuzhiyun	help
22*4882a593Smuzhiyun	  When enabled you can select a physical address to load the dtb from.
23*4882a593Smuzhiyun	  Normally this address is passed by a bootloader such as u-boot but
24*4882a593Smuzhiyun	  using this you can use a devicetree without a bootloader.
25*4882a593Smuzhiyun	  This way you can store a devicetree in NOR flash or an onchip rom.
26*4882a593Smuzhiyun	  Please note that this address is used directly so you have to manually
27*4882a593Smuzhiyun	  do address translation if it's connected to a bridge. Also take into
28*4882a593Smuzhiyun	  account that when using an MMU you'd have to ad 0xC0000000 to your
29*4882a593Smuzhiyun	  address
30*4882a593Smuzhiyun
31*4882a593Smuzhiyunconfig NIOS2_DTB_PHYS_ADDR
32*4882a593Smuzhiyun	hex "DTB Address"
33*4882a593Smuzhiyun	depends on NIOS2_DTB_AT_PHYS_ADDR
34*4882a593Smuzhiyun	default "0xC0000000"
35*4882a593Smuzhiyun	help
36*4882a593Smuzhiyun	  Physical address of a dtb blob.
37*4882a593Smuzhiyun
38*4882a593Smuzhiyunconfig NIOS2_DTB_SOURCE_BOOL
39*4882a593Smuzhiyun	bool "Compile and link device tree into kernel image"
40*4882a593Smuzhiyun	depends on !COMPILE_TEST
41*4882a593Smuzhiyun	help
42*4882a593Smuzhiyun	  This allows you to specify a dts (device tree source) file
43*4882a593Smuzhiyun	  which will be compiled and linked into the kernel image.
44*4882a593Smuzhiyun
45*4882a593Smuzhiyunconfig NIOS2_DTB_SOURCE
46*4882a593Smuzhiyun	string "Device tree source file"
47*4882a593Smuzhiyun	depends on NIOS2_DTB_SOURCE_BOOL
48*4882a593Smuzhiyun	default ""
49*4882a593Smuzhiyun	help
50*4882a593Smuzhiyun	  Absolute path to the device tree source (dts) file describing your
51*4882a593Smuzhiyun	  system.
52*4882a593Smuzhiyun
53*4882a593Smuzhiyuncomment "Nios II instructions"
54*4882a593Smuzhiyun
55*4882a593Smuzhiyunconfig NIOS2_ARCH_REVISION
56*4882a593Smuzhiyun	int "Select Nios II architecture revision"
57*4882a593Smuzhiyun	range 1 2
58*4882a593Smuzhiyun	default 1
59*4882a593Smuzhiyun	help
60*4882a593Smuzhiyun	  Select between Nios II R1 and Nios II R2 . The architectures
61*4882a593Smuzhiyun	  are binary incompatible. Default is R1 .
62*4882a593Smuzhiyun
63*4882a593Smuzhiyunconfig NIOS2_HW_MUL_SUPPORT
64*4882a593Smuzhiyun	bool "Enable MUL instruction"
65*4882a593Smuzhiyun	help
66*4882a593Smuzhiyun	  Set to true if you configured the Nios II to include the MUL
67*4882a593Smuzhiyun	  instruction.  This will enable the -mhw-mul compiler flag.
68*4882a593Smuzhiyun
69*4882a593Smuzhiyunconfig NIOS2_HW_MULX_SUPPORT
70*4882a593Smuzhiyun	bool "Enable MULX instruction"
71*4882a593Smuzhiyun	help
72*4882a593Smuzhiyun	  Set to true if you configured the Nios II to include the MULX
73*4882a593Smuzhiyun	  instruction.  Enables the -mhw-mulx compiler flag.
74*4882a593Smuzhiyun
75*4882a593Smuzhiyunconfig NIOS2_HW_DIV_SUPPORT
76*4882a593Smuzhiyun	bool "Enable DIV instruction"
77*4882a593Smuzhiyun	help
78*4882a593Smuzhiyun	  Set to true if you configured the Nios II to include the DIV
79*4882a593Smuzhiyun	  instruction.  Enables the -mhw-div compiler flag.
80*4882a593Smuzhiyun
81*4882a593Smuzhiyunconfig NIOS2_BMX_SUPPORT
82*4882a593Smuzhiyun	bool "Enable BMX instructions"
83*4882a593Smuzhiyun	depends on NIOS2_ARCH_REVISION = 2
84*4882a593Smuzhiyun	help
85*4882a593Smuzhiyun	  Set to true if you configured the Nios II R2 to include
86*4882a593Smuzhiyun	  the BMX Bit Manipulation Extension instructions. Enables
87*4882a593Smuzhiyun	  the -mbmx compiler flag.
88*4882a593Smuzhiyun
89*4882a593Smuzhiyunconfig NIOS2_CDX_SUPPORT
90*4882a593Smuzhiyun	bool "Enable CDX instructions"
91*4882a593Smuzhiyun	depends on NIOS2_ARCH_REVISION = 2
92*4882a593Smuzhiyun	help
93*4882a593Smuzhiyun	  Set to true if you configured the Nios II R2 to include
94*4882a593Smuzhiyun	  the CDX Bit Manipulation Extension instructions. Enables
95*4882a593Smuzhiyun	  the -mcdx compiler flag.
96*4882a593Smuzhiyun
97*4882a593Smuzhiyunconfig NIOS2_FPU_SUPPORT
98*4882a593Smuzhiyun	bool "Custom floating point instr support"
99*4882a593Smuzhiyun	help
100*4882a593Smuzhiyun	  Enables the -mcustom-fpu-cfg=60-1 compiler flag.
101*4882a593Smuzhiyun
102*4882a593Smuzhiyunconfig NIOS2_CI_SWAB_SUPPORT
103*4882a593Smuzhiyun	bool "Byteswap custom instruction"
104*4882a593Smuzhiyun	help
105*4882a593Smuzhiyun	  Use the byteswap (endian converter) Nios II custom instruction provided
106*4882a593Smuzhiyun	  by Altera and which can be enabled in QSYS builder. This accelerates
107*4882a593Smuzhiyun	  endian conversions in the kernel (e.g. ntohs).
108*4882a593Smuzhiyun
109*4882a593Smuzhiyunconfig NIOS2_CI_SWAB_NO
110*4882a593Smuzhiyun	int "Byteswap custom instruction number" if NIOS2_CI_SWAB_SUPPORT
111*4882a593Smuzhiyun	default 0
112*4882a593Smuzhiyun	help
113*4882a593Smuzhiyun	  Number of the instruction as configured in QSYS Builder.
114*4882a593Smuzhiyun
115*4882a593Smuzhiyuncomment "Cache settings"
116*4882a593Smuzhiyun
117*4882a593Smuzhiyunconfig CUSTOM_CACHE_SETTINGS
118*4882a593Smuzhiyun	bool "Custom cache settings"
119*4882a593Smuzhiyun	help
120*4882a593Smuzhiyun	  This option allows you to tweak the cache settings used during early
121*4882a593Smuzhiyun	  boot (where the information from device tree is not yet available).
122*4882a593Smuzhiyun	  There should be no reason to change these values. Linux will work
123*4882a593Smuzhiyun	  perfectly fine, even if the Nios II is configured with smaller caches.
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun	  Say N here unless you know what you are doing.
126*4882a593Smuzhiyun
127*4882a593Smuzhiyunconfig NIOS2_DCACHE_SIZE
128*4882a593Smuzhiyun	hex "D-Cache size" if CUSTOM_CACHE_SETTINGS
129*4882a593Smuzhiyun	range 0x200 0x10000
130*4882a593Smuzhiyun	default "0x800"
131*4882a593Smuzhiyun	help
132*4882a593Smuzhiyun	  Maximum possible data cache size.
133*4882a593Smuzhiyun
134*4882a593Smuzhiyunconfig NIOS2_DCACHE_LINE_SIZE
135*4882a593Smuzhiyun	hex "D-Cache line size" if CUSTOM_CACHE_SETTINGS
136*4882a593Smuzhiyun	range 0x10 0x20
137*4882a593Smuzhiyun	default "0x20"
138*4882a593Smuzhiyun	help
139*4882a593Smuzhiyun	  Minimum possible data cache line size.
140*4882a593Smuzhiyun
141*4882a593Smuzhiyunconfig NIOS2_ICACHE_SIZE
142*4882a593Smuzhiyun	hex "I-Cache size" if CUSTOM_CACHE_SETTINGS
143*4882a593Smuzhiyun	range 0x200 0x10000
144*4882a593Smuzhiyun	default "0x1000"
145*4882a593Smuzhiyun	help
146*4882a593Smuzhiyun	  Maximum possible instruction cache size.
147*4882a593Smuzhiyun
148*4882a593Smuzhiyunendmenu
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