1*4882a593Smuzhiyun~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 2*4882a593SmuzhiyunMOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP 3*4882a593SmuzhiyunM68000 Hi-Performance Microprocessor Division 4*4882a593SmuzhiyunM68060 Software Package 5*4882a593SmuzhiyunProduction Release P1.00 -- October 10, 1994 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunM68060 Software Package Copyright © 1993, 1994 Motorola Inc. All rights reserved. 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunTHE SOFTWARE is provided on an "AS IS" basis and without warranty. 10*4882a593SmuzhiyunTo the maximum extent permitted by applicable law, 11*4882a593SmuzhiyunMOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 12*4882a593SmuzhiyunINCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 13*4882a593Smuzhiyunand any warranty against infringement with regard to the SOFTWARE 14*4882a593Smuzhiyun(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials. 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunTo the maximum extent permitted by applicable law, 17*4882a593SmuzhiyunIN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER 18*4882a593Smuzhiyun(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, 19*4882a593SmuzhiyunBUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) 20*4882a593SmuzhiyunARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. 21*4882a593SmuzhiyunMotorola assumes no responsibility for the maintenance and support of the SOFTWARE. 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunYou are hereby granted a copyright license to use, modify, and distribute the SOFTWARE 24*4882a593Smuzhiyunso long as this entire notice is retained without alteration in any modified and/or 25*4882a593Smuzhiyunredistributed versions, and that such modified versions are clearly identified as such. 26*4882a593SmuzhiyunNo licenses are granted by implication, estoppel or otherwise under any patents 27*4882a593Smuzhiyunor trademarks of Motorola, Inc. 28*4882a593Smuzhiyun~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun68060 FLOATING-POINT SOFTWARE PACKAGE (Library version) 31*4882a593Smuzhiyun-------------------------------------------------------- 32*4882a593Smuzhiyun 33*4882a593SmuzhiyunThe file fplsp.sa contains the "Library version" of the 34*4882a593Smuzhiyun68060SP Floating-Point Software Package. The routines 35*4882a593Smuzhiyunincluded in this module can be used to emulate the 36*4882a593SmuzhiyunFP instructions not implemented in 68060 hardware. These 37*4882a593Smuzhiyuninstructions normally take exception vector #11 38*4882a593Smuzhiyun"FP Unimplemented Instruction". 39*4882a593Smuzhiyun 40*4882a593SmuzhiyunBy re-compiling a program that uses these instructions, and 41*4882a593Smuzhiyunmaking subroutine calls in place of the unimplemented 42*4882a593Smuzhiyuninstructions, a program can avoid the overhead associated 43*4882a593Smuzhiyunwith taking the exception. 44*4882a593Smuzhiyun 45*4882a593SmuzhiyunRelease file format: 46*4882a593Smuzhiyun-------------------- 47*4882a593SmuzhiyunThe file fplsp.sa is essentially a hexadecimal image of the 48*4882a593Smuzhiyunrelease package. This is the ONLY format which will be supported. 49*4882a593SmuzhiyunThe hex image was created by assembling the source code and 50*4882a593Smuzhiyunthen converting the resulting binary output image into an 51*4882a593SmuzhiyunASCII text file. The hexadecimal numbers are listed 52*4882a593Smuzhiyunusing the Motorola Assembly Syntax assembler directive "dc.l" 53*4882a593Smuzhiyun(define constant longword). The file can be converted to other 54*4882a593Smuzhiyunassembly syntaxes by using any word processor with a global 55*4882a593Smuzhiyunsearch and replace function. 56*4882a593Smuzhiyun 57*4882a593SmuzhiyunTo assist in assembling and linking this module with other modules, 58*4882a593Smuzhiyunthe installer should add a symbolic label to the top of the file. 59*4882a593SmuzhiyunThis will allow calling routines to access the entry points 60*4882a593Smuzhiyunof this package. 61*4882a593Smuzhiyun 62*4882a593SmuzhiyunThe source code fplsp.s has also been included but only for 63*4882a593Smuzhiyundocumentation purposes. 64*4882a593Smuzhiyun 65*4882a593SmuzhiyunRelease file structure: 66*4882a593Smuzhiyun----------------------- 67*4882a593SmuzhiyunThe file fplsp.sa contains an "Entry-Point" section and a 68*4882a593Smuzhiyuncode section. The FPLSP has no "Call-Out" section. The first section 69*4882a593Smuzhiyunis the "Entry-Point" section. In order to access a function in the 70*4882a593Smuzhiyunpackage, a program must "bsr" or "jsr" to the location listed 71*4882a593Smuzhiyunbelow in "68060FPLSP entry points" that corresponds to the desired 72*4882a593Smuzhiyunfunction. A branch instruction located at the selected entry point 73*4882a593Smuzhiyunwithin the package will then enter the correct emulation code routine. 74*4882a593Smuzhiyun 75*4882a593SmuzhiyunThe entry point addresses at the beginning of the package will remain 76*4882a593Smuzhiyunfixed so that a program calling the routines will not have to be 77*4882a593Smuzhiyunre-compiled with every new 68060FPLSP release. 78*4882a593Smuzhiyun 79*4882a593SmuzhiyunThere are 3 entry-points for each instruction type: single precision, 80*4882a593Smuzhiyundouble precision, and extended precision. 81*4882a593Smuzhiyun 82*4882a593SmuzhiyunAs an example, the "fsin" library instruction can be passed an 83*4882a593Smuzhiyunextended precision operand if program executes: 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun# fsin.x fp0 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun fmovm.x &0x01,-(%sp) # pass operand on stack 88*4882a593Smuzhiyun bsr.l _060FPLSP_TOP+0x1a8 # branch to fsin routine 89*4882a593Smuzhiyun add.l &0xc,%sp # clear operand from stack 90*4882a593Smuzhiyun 91*4882a593SmuzhiyunUpon return, fp0 holds the correct result. The FPSR is 92*4882a593Smuzhiyunset correctly. The FPCR is unchanged. The FPIAR is undefined. 93*4882a593Smuzhiyun 94*4882a593SmuzhiyunAnother example. This time, a dyadic operation: 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun# frem.s %fp1,%fp0 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun fmov.s %fp1,-(%sp) # pass src operand 99*4882a593Smuzhiyun fmov.s %fp0,-(%sp) # pass dst operand 100*4882a593Smuzhiyun bsr.l _060FPLSP_TOP+0x168 # branch to frem routine 101*4882a593Smuzhiyun addq.l &0x8,%sp # clear operands from stack 102*4882a593Smuzhiyun 103*4882a593SmuzhiyunAgain, the result is returned in fp0. Note that BOTH operands 104*4882a593Smuzhiyunare passed in single precision format. 105*4882a593Smuzhiyun 106*4882a593SmuzhiyunException reporting: 107*4882a593Smuzhiyun-------------------- 108*4882a593SmuzhiyunThe package takes exceptions according to the FPCR value upon subroutine 109*4882a593Smuzhiyunentry. If an exception should be reported, then the package forces 110*4882a593Smuzhiyunthis exception using implemented floating-point instructions. 111*4882a593SmuzhiyunFor example, if the instruction being emulated should cause a 112*4882a593Smuzhiyunfloating-point Operand Error exception, then the library routine 113*4882a593Smuzhiyunexecutes an FMUL of a zero and an infinity to force the OPERR 114*4882a593Smuzhiyunexception. Although the FPIAR will be undefined for the enabled 115*4882a593SmuzhiyunOperand Error exception handler, the user will at least be able 116*4882a593Smuzhiyunto record that the event occurred. 117*4882a593Smuzhiyun 118*4882a593SmuzhiyunMiscellaneous: 119*4882a593Smuzhiyun-------------- 120*4882a593SmuzhiyunThe package does not attempt to correctly emulate instructions 121*4882a593Smuzhiyunwith Signalling NAN inputs. Use of SNANs should be avoided with 122*4882a593Smuzhiyunthis package. 123*4882a593Smuzhiyun 124*4882a593SmuzhiyunThe fabs/fadd/fdiv/fint/fintrz/fmul/fneg/fsqrt/fsub entry points 125*4882a593Smuzhiyunare provided for the convenience of older compilers that make 126*4882a593Smuzhiyunsubroutine calls for all fp instructions. The code does NOT emulate 127*4882a593Smuzhiyunthe instruction but rather simply executes it. 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun68060FPLSP entry points: 130*4882a593Smuzhiyun------------------------ 131*4882a593Smuzhiyun_060FPLSP_TOP: 132*4882a593Smuzhiyun0x000: _060LSP__facoss_ 133*4882a593Smuzhiyun0x008: _060LSP__facosd_ 134*4882a593Smuzhiyun0x010: _060LSP__facosx_ 135*4882a593Smuzhiyun0x018: _060LSP__fasins_ 136*4882a593Smuzhiyun0x020: _060LSP__fasind_ 137*4882a593Smuzhiyun0x028: _060LSP__fasinx_ 138*4882a593Smuzhiyun0x030: _060LSP__fatans_ 139*4882a593Smuzhiyun0x038: _060LSP__fatand_ 140*4882a593Smuzhiyun0x040: _060LSP__fatanx_ 141*4882a593Smuzhiyun0x048: _060LSP__fatanhs_ 142*4882a593Smuzhiyun0x050: _060LSP__fatanhd_ 143*4882a593Smuzhiyun0x058: _060LSP__fatanhx_ 144*4882a593Smuzhiyun0x060: _060LSP__fcoss_ 145*4882a593Smuzhiyun0x068: _060LSP__fcosd_ 146*4882a593Smuzhiyun0x070: _060LSP__fcosx_ 147*4882a593Smuzhiyun0x078: _060LSP__fcoshs_ 148*4882a593Smuzhiyun0x080: _060LSP__fcoshd_ 149*4882a593Smuzhiyun0x088: _060LSP__fcoshx_ 150*4882a593Smuzhiyun0x090: _060LSP__fetoxs_ 151*4882a593Smuzhiyun0x098: _060LSP__fetoxd_ 152*4882a593Smuzhiyun0x0a0: _060LSP__fetoxx_ 153*4882a593Smuzhiyun0x0a8: _060LSP__fetoxm1s_ 154*4882a593Smuzhiyun0x0b0: _060LSP__fetoxm1d_ 155*4882a593Smuzhiyun0x0b8: _060LSP__fetoxm1x_ 156*4882a593Smuzhiyun0x0c0: _060LSP__fgetexps_ 157*4882a593Smuzhiyun0x0c8: _060LSP__fgetexpd_ 158*4882a593Smuzhiyun0x0d0: _060LSP__fgetexpx_ 159*4882a593Smuzhiyun0x0d8: _060LSP__fgetmans_ 160*4882a593Smuzhiyun0x0e0: _060LSP__fgetmand_ 161*4882a593Smuzhiyun0x0e8: _060LSP__fgetmanx_ 162*4882a593Smuzhiyun0x0f0: _060LSP__flog10s_ 163*4882a593Smuzhiyun0x0f8: _060LSP__flog10d_ 164*4882a593Smuzhiyun0x100: _060LSP__flog10x_ 165*4882a593Smuzhiyun0x108: _060LSP__flog2s_ 166*4882a593Smuzhiyun0x110: _060LSP__flog2d_ 167*4882a593Smuzhiyun0x118: _060LSP__flog2x_ 168*4882a593Smuzhiyun0x120: _060LSP__flogns_ 169*4882a593Smuzhiyun0x128: _060LSP__flognd_ 170*4882a593Smuzhiyun0x130: _060LSP__flognx_ 171*4882a593Smuzhiyun0x138: _060LSP__flognp1s_ 172*4882a593Smuzhiyun0x140: _060LSP__flognp1d_ 173*4882a593Smuzhiyun0x148: _060LSP__flognp1x_ 174*4882a593Smuzhiyun0x150: _060LSP__fmods_ 175*4882a593Smuzhiyun0x158: _060LSP__fmodd_ 176*4882a593Smuzhiyun0x160: _060LSP__fmodx_ 177*4882a593Smuzhiyun0x168: _060LSP__frems_ 178*4882a593Smuzhiyun0x170: _060LSP__fremd_ 179*4882a593Smuzhiyun0x178: _060LSP__fremx_ 180*4882a593Smuzhiyun0x180: _060LSP__fscales_ 181*4882a593Smuzhiyun0x188: _060LSP__fscaled_ 182*4882a593Smuzhiyun0x190: _060LSP__fscalex_ 183*4882a593Smuzhiyun0x198: _060LSP__fsins_ 184*4882a593Smuzhiyun0x1a0: _060LSP__fsind_ 185*4882a593Smuzhiyun0x1a8: _060LSP__fsinx_ 186*4882a593Smuzhiyun0x1b0: _060LSP__fsincoss_ 187*4882a593Smuzhiyun0x1b8: _060LSP__fsincosd_ 188*4882a593Smuzhiyun0x1c0: _060LSP__fsincosx_ 189*4882a593Smuzhiyun0x1c8: _060LSP__fsinhs_ 190*4882a593Smuzhiyun0x1d0: _060LSP__fsinhd_ 191*4882a593Smuzhiyun0x1d8: _060LSP__fsinhx_ 192*4882a593Smuzhiyun0x1e0: _060LSP__ftans_ 193*4882a593Smuzhiyun0x1e8: _060LSP__ftand_ 194*4882a593Smuzhiyun0x1f0: _060LSP__ftanx_ 195*4882a593Smuzhiyun0x1f8: _060LSP__ftanhs_ 196*4882a593Smuzhiyun0x200: _060LSP__ftanhd_ 197*4882a593Smuzhiyun0x208: _060LSP__ftanhx_ 198*4882a593Smuzhiyun0x210: _060LSP__ftentoxs_ 199*4882a593Smuzhiyun0x218: _060LSP__ftentoxd_ 200*4882a593Smuzhiyun0x220: _060LSP__ftentoxx_ 201*4882a593Smuzhiyun0x228: _060LSP__ftwotoxs_ 202*4882a593Smuzhiyun0x230: _060LSP__ftwotoxd_ 203*4882a593Smuzhiyun0x238: _060LSP__ftwotoxx_ 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun0x240: _060LSP__fabss_ 206*4882a593Smuzhiyun0x248: _060LSP__fabsd_ 207*4882a593Smuzhiyun0x250: _060LSP__fabsx_ 208*4882a593Smuzhiyun0x258: _060LSP__fadds_ 209*4882a593Smuzhiyun0x260: _060LSP__faddd_ 210*4882a593Smuzhiyun0x268: _060LSP__faddx_ 211*4882a593Smuzhiyun0x270: _060LSP__fdivs_ 212*4882a593Smuzhiyun0x278: _060LSP__fdivd_ 213*4882a593Smuzhiyun0x280: _060LSP__fdivx_ 214*4882a593Smuzhiyun0x288: _060LSP__fints_ 215*4882a593Smuzhiyun0x290: _060LSP__fintd_ 216*4882a593Smuzhiyun0x298: _060LSP__fintx_ 217*4882a593Smuzhiyun0x2a0: _060LSP__fintrzs_ 218*4882a593Smuzhiyun0x2a8: _060LSP__fintrzd_ 219*4882a593Smuzhiyun0x2b0: _060LSP__fintrzx_ 220*4882a593Smuzhiyun0x2b8: _060LSP__fmuls_ 221*4882a593Smuzhiyun0x2c0: _060LSP__fmuld_ 222*4882a593Smuzhiyun0x2c8: _060LSP__fmulx_ 223*4882a593Smuzhiyun0x2d0: _060LSP__fnegs_ 224*4882a593Smuzhiyun0x2d8: _060LSP__fnegd_ 225*4882a593Smuzhiyun0x2e0: _060LSP__fnegx_ 226*4882a593Smuzhiyun0x2e8: _060LSP__fsqrts_ 227*4882a593Smuzhiyun0x2f0: _060LSP__fsqrtd_ 228*4882a593Smuzhiyun0x2f8: _060LSP__fsqrtx_ 229*4882a593Smuzhiyun0x300: _060LSP__fsubs_ 230*4882a593Smuzhiyun0x308: _060LSP__fsubd_ 231*4882a593Smuzhiyun0x310: _060LSP__fsubx_ 232