Searched refs:hdmi_clk_cfg (Results 1 – 5 of 5) sorted by relevance
342 clrsetbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_PLL_MASK, in sunxi_dw_hdmi_probe()352 setbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_GATE); in sunxi_dw_hdmi_probe()
100 clrsetbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_PLL_MASK, in sunxi_hdmi_hpd_detect()110 setbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_GATE); in sunxi_hdmi_hpd_detect()131 clrbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_GATE); in sunxi_hdmi_shutdown()225 setbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_DDC_GATE); in sunxi_hdmi_edid_get_mode()262 clrbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_DDC_GATE); in sunxi_hdmi_edid_get_mode()
79 u32 hdmi_clk_cfg; /* 0x150 HDMI module clock */ member
85 u32 hdmi_clk_cfg; /* 0x150 */ member
98 u32 hdmi_clk_cfg; /* 0x150 HDMI module clock */ member