Searched refs:h_end (Results 1 – 8 of 8) sorted by relevance
89 | (conf->region[c].h_end << in hist_setup_regs()323 if (user_cfg->region[c].h_end & ~ISPHIST_REG_START_END_MASK) in hist_validate_params()329 if (user_cfg->region[c].h_start > user_cfg->region[c].h_end) in hist_validate_params()389 if (cur_cfg->region[c].h_end != user_cfg->region[c].h_end) in hist_comp_params()
103 __be32 *h, *h_end; in handle_iso() local107 for (h = header, h_end = h + header_length / 4; h < h_end; h++) { in handle_iso()
83 int h_end = h_start + info->var.xres; in wm8505fb_set_timing() local84 int h_all = h_end + info->var.right_margin; in wm8505fb_set_timing()95 writel(h_end, fbi->regbase + WMT_GOVR_TIMING_H_END); in wm8505fb_set_timing()
210 __u16 h_end; member
1145 u32 h_end; in imx274_apply_trimming() local1154 h_end = h_start + imx274->crop.width; in imx274_apply_trimming()1176 h_end, 2); in imx274_apply_trimming()
230 __u16 h_end; member
299 int h_end = (info->var.xres + info->var.right_margin + in nvidia_calc_regs() local326 h_end = h_total - 2; in nvidia_calc_regs()337 | SetBitField(h_end, 4: 0, 4:0); in nvidia_calc_regs()