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Searched refs:cs_num (Results 1 – 23 of 23) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_training_hw_algo.c52 u32 cs_num = 0, max_read_sample = 0, min_read_sample = 0; in ddr3_tip_write_additional_odt_setting() local
69 for (cs_num = 0; cs_num < MAX_CS_NUM; cs_num++) { in ddr3_tip_write_additional_odt_setting()
70 read_sample[cs_num] = GET_RD_SAMPLE_DELAY(val, cs_num); in ddr3_tip_write_additional_odt_setting()
73 if (read_sample[cs_num] >= max_read_sample) { in ddr3_tip_write_additional_odt_setting()
74 if (read_sample[cs_num] == max_read_sample) in ddr3_tip_write_additional_odt_setting()
77 max_read_sample = read_sample[cs_num]; in ddr3_tip_write_additional_odt_setting()
86 RL_PHY_REG + CS_REG_VALUE(cs_num), in ddr3_tip_write_additional_odt_setting()
96 if (read_sample[cs_num] < min_read_sample) in ddr3_tip_write_additional_odt_setting()
97 min_read_sample = read_sample[cs_num]; in ddr3_tip_write_additional_odt_setting()
123 u32 cs_num; in get_valid_win_rx() local
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H A Dddr3_training_bist.c32 u32 offset, u32 cs_num, u32 pattern_addr_length) in ddr3_tip_bist_activate() argument
65 rd_mode, cs_num, addr_stress_jump, duration)); in ddr3_tip_bist_activate()
185 u32 cs_num) in hws_ddr3_run_bist() argument
195 hws_ddr3_cs_base_adr_calc(i, cs_num, &win_base); in hws_ddr3_run_bist()
201 cs_num, 15); in hws_ddr3_run_bist()
212 cs_num, 15); in hws_ddr3_run_bist()
H A Dddr3_training_pbs.c52 u32 pup = 0, bit = 0, if_id = 0, all_lock = 0, cs_num = 0; in ddr3_tip_pbs() local
88 pbs_pattern, search_edge, CS_SINGLE, cs_num, in ddr3_tip_pbs()
219 search_edge, CS_SINGLE, cs_num, in ddr3_tip_pbs()
402 CS_SINGLE, cs_num, train_status); in ddr3_tip_pbs()
531 cs_num, train_status); in ddr3_tip_pbs()
628 search_edge, CS_SINGLE, cs_num, in ddr3_tip_pbs()
936 int ddr3_tip_print_pbs_result(u32 dev_num, u32 cs_num, enum pbs_dir pbs_mode) in ddr3_tip_print_pbs_result() argument
940 (PBS_RX_PHY_REG + cs_num * 0x10) : in ddr3_tip_print_pbs_result()
941 (PBS_TX_PHY_REG + cs_num * 0x10); in ddr3_tip_print_pbs_result()
944 printf("CS%d, %s ,PBS\n", cs_num, in ddr3_tip_print_pbs_result()
H A Dddr3_training_ip_engine.c183 enum hws_ddr_cs cs_type, u32 cs_num, in ddr3_tip_ip_training() argument
230 ODPG_DATA_CONTROL_REG, 0x3 | cs_num << 26, in ddr3_tip_ip_training()
520 u32 delay_between_burst, u32 rd_mode, u32 cs_num, in ddr3_tip_configure_odpg() argument
528 (rx_phases << 21) | (rd_mode << 25) | (cs_num << 26) | in ddr3_tip_configure_odpg()
900 enum hws_ddr_cs train_cs_type, u32 cs_num, in ddr3_tip_ip_training_wrapper_int() argument
954 pattern, edge_comp_used, train_cs_type, cs_num)); in ddr3_tip_ip_training_wrapper_int()
961 cs_num, train_status); in ddr3_tip_ip_training_wrapper_int()
973 cs_num = 0; in ddr3_tip_ip_training_wrapper_int()
1001 enum hws_ddr_cs train_cs_type, u32 cs_num, in ddr3_tip_ip_training_wrapper() argument
1027 train_cs_type, cs_num, train_status)); in ddr3_tip_ip_training_wrapper()
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H A Dddr3_training.c23 #define CS_CBE_VALUE(cs_num) (cs_cbe_reg[cs_num]) argument
207 int ddr3_tip_configure_cs(u32 dev_num, u32 if_id, u32 cs_num, u32 enable) in ddr3_tip_configure_cs() argument
218 SDRAM_ACCESS_CONTROL_REG, (data << (cs_num * 4)), in ddr3_tip_configure_cs()
219 0x3 << (cs_num * 4))); in ddr3_tip_configure_cs()
226 (addr_hi << (2 + cs_num * 4)), in ddr3_tip_configure_cs()
227 0x3 << (2 + cs_num * 4))); in ddr3_tip_configure_cs()
233 data_high << (20 + cs_num), 1 << (20 + cs_num))); in ddr3_tip_configure_cs()
238 SDRAM_ACCESS_CONTROL_REG, 1 << (16 + cs_num), in ddr3_tip_configure_cs()
239 1 << (16 + cs_num))); in ddr3_tip_configure_cs()
241 switch (cs_num) { in ddr3_tip_configure_cs()
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H A Dddr3_training_ip_bist.h44 u32 offset, u32 cs_num, u32 pattern_addr_length);
46 u32 cs_num);
H A Dddr3_training_ip_engine.h63 enum hws_ddr_cs cs_type, u32 cs_num,
77 enum hws_ddr_cs train_cs_type, u32 cs_num,
H A Dddr3_training_ip_flow.h267 #define CS_REG_VALUE(cs_num) (cs_mask_reg[cs_num]) argument
332 u32 delay_between_burst, u32 rd_mode, u32 cs_num,
H A Dddr3_training_ip.h118 u8 cs_num; member
H A Dddr3_training_ip_prv_if.h79 enum hws_bist_operation oper_type, u32 offset, u32 cs_num,
H A Dddr3_init.h361 int ddr3_tip_print_pbs_result(u32 dev_num, u32 cs_num, enum pbs_dir pbs_mode);
H A Dddr3_training_static.c258 (bus_index % 4)].cs_bitmask].cs_num; in ddr3_tip_read_leveling_static_config()
/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_sdram.c495 u32 chan, byte_count, cs_num, byte; in ddr3_dram_sram_burst() local
511 cs_num = (src / (1 + SDRAM_CS_SIZE)); in ddr3_dram_sram_burst()
513 ((cs_num << 1) | (1 << 0))); in ddr3_dram_sram_burst()
518 cs_num = (dst / (1 + SDRAM_CS_SIZE)); in ddr3_dram_sram_burst()
520 ((cs_num << 25) | (1 << 24))); in ddr3_dram_sram_burst()
H A Dddr3_spd.c582 u32 cs, cl, cs_num, cs_ena; local
639 cs_num = 0;
641 cs_num = ddr3_get_cs_num_from_reg();
645 cs_num += dimm_info[dimm].num_of_module_ranks;
647 if (cs_num > MAX_CS) {
688 DEBUG_INIT_FULL_C("DDR3 - DUNIT-SET - Number of CS = ", cs_num, 1);
1072 if (cs_num > 1)
/OK3568_Linux_fs/kernel/include/linux/spi/
H A Dspi-fsl-dspi.h17 u32 cs_num; member
/OK3568_Linux_fs/kernel/drivers/ata/
H A Dpata_octeon_cf.c839 const __be32 *cs_num; in octeon_cf_probe() local
876 cs_num = reg_prop->value; in octeon_cf_probe()
877 cf_port->cs0 = be32_to_cpup(cs_num); in octeon_cf_probe()
924 cs_num += n_addr + n_size; in octeon_cf_probe()
925 cf_port->cs1 = be32_to_cpup(cs_num); in octeon_cf_probe()
/OK3568_Linux_fs/kernel/arch/m68k/coldfire/
H A Dstmark2.c58 .cs_num = 4,
/OK3568_Linux_fs/kernel/drivers/spi/
H A Dspi-dln2.c183 static int dln2_spi_get_cs_num(struct dln2_spi *dln2, u16 *cs_num) in dln2_spi_get_cs_num() argument
202 *cs_num = le16_to_cpu(rx.cs_count); in dln2_spi_get_cs_num()
204 dev_dbg(&dln2->pdev->dev, "cs_num = %d\n", *cs_num); in dln2_spi_get_cs_num()
H A Dspi-fsl-dspi.c1224 int ret, cs_num, bus_num = -1; in dspi_probe() local
1254 ctlr->num_chipselect = ctlr->max_native_cs = pdata->cs_num; in dspi_probe()
1262 ret = of_property_read_u32(np, "spi-num-chipselects", &cs_num); in dspi_probe()
1267 ctlr->num_chipselect = ctlr->max_native_cs = cs_num; in dspi_probe()
H A Dspi-pxa2xx.c92 unsigned cs_num; member
130 .cs_num = 2,
1848 } else if (config->cs_num) { in pxa2xx_spi_probe()
1849 platform_info->num_chipselect = config->cs_num; in pxa2xx_spi_probe()
/OK3568_Linux_fs/u-boot/cmd/ddr_tool/ddr_dq_eye/
H A Dddr_dq_eye.c302 for (cs = 0; cs < result.cs_num; cs++) { in do_ddr_dq_eye()
/OK3568_Linux_fs/u-boot/drivers/ram/rockchip/
H A Dsdram_rv1126.c1997 void __iomem *phy_base, u8 cs_num) in init_rw_trn_result_struct() argument
2001 result->cs_num = cs_num; in init_rw_trn_result_struct()
2039 struct fsp_rw_trn_result *result, u8 cs_num, in save_rw_trn_deskew() argument
2048 for (cs = 0; cs < cs_num; cs++) { in save_rw_trn_deskew()
2166 rw_trn_result.cs_num, (u8)(min_val * (-1)), in high_freq_training()
2183 rw_trn_result.cs_num, (u8)(min_val * (-1)), in high_freq_training()
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dsdram_common.h276 u8 cs_num; member