Searched refs:ba_intlv_ctl (Results 1 – 5 of 5) sorted by relevance
877 popts->ba_intlv_ctl = 0; in populate_memctl_options()1195 popts->ba_intlv_ctl = FSL_DDR_CS0_CS1; in populate_memctl_options()1198 popts->ba_intlv_ctl = FSL_DDR_CS2_CS3; in populate_memctl_options()1201 popts->ba_intlv_ctl = FSL_DDR_CS0_CS1_AND_CS2_CS3; in populate_memctl_options()1204 popts->ba_intlv_ctl = FSL_DDR_CS0_CS1_CS2_CS3; in populate_memctl_options()1207 popts->ba_intlv_ctl = auto_bank_intlv(pdimm); in populate_memctl_options()1210 switch (popts->ba_intlv_ctl & FSL_DDR_CS0_CS1_CS2_CS3) { in populate_memctl_options()1214 popts->ba_intlv_ctl = 0; in populate_memctl_options()1225 popts->ba_intlv_ctl = 0; in populate_memctl_options()1231 popts->ba_intlv_ctl = 0; in populate_memctl_options()[all …]
776 unsigned int ba_intlv_ctl; /* Bank (CS) interleaving control */ in set_ddr_sdram_cfg() local821 ba_intlv_ctl = popts->ba_intlv_ctl; in set_ddr_sdram_cfg()839 | ((ba_intlv_ctl & 0x7F) << 8) in set_ddr_sdram_cfg()2390 switch (popts->ba_intlv_ctl & FSL_DDR_CS0_CS1_CS2_CS3) { in compute_fsl_memctl_config_regs()2416 switch (popts->ba_intlv_ctl & FSL_DDR_CS0_CS1_CS2_CS3) { in compute_fsl_memctl_config_regs()
314 switch (pinfo->memctl_opts[first_ctrl].ba_intlv_ctl & in __step_assign_addresses()
537 CTRL_OPTIONS(ba_intlv_ctl), in fsl_ddr_options_edit()827 CTRL_OPTIONS_HEX(ba_intlv_ctl), in print_memctl_options()
346 unsigned int ba_intlv_ctl; member