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Searched refs:aud_2_parents (Results 1 – 5 of 5) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/clk/mediatek/
H A Dclk-mt6797.c277 static const char * const aud_2_parents[] = { variable
367 MUX_GATE(CLK_TOP_MUX_AUD_2, "aud_2_sel", aud_2_parents,
H A Dclk-mt6779.c546 static const char * const aud_2_parents[] = { variable
758 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_2, "aud_2_sel", aud_2_parents,
H A Dclk-mt8173.c412 static const char * const aud_2_parents[] __initconst = { variable
581 MUX_GATE(CLK_TOP_AUD_2_SEL, "aud_2_sel", aud_2_parents, 0x00b0, 0, 2, 7),
H A Dclk-mt8183.c513 static const char * const aud_2_parents[] = { variable
656 aud_2_parents, 0xe0,
H A Dclk-mt2712.c482 static const char * const aud_2_parents[] = { variable
800 aud_2_parents, 0x0b0, 0, 2, 7),