Searched refs:X86_CR0_CD (Results 1 – 17 of 17) sorted by relevance
104 andl $(~(X86_CR0_CD | X86_CR0_NW)), %eax131 orl $X86_CR0_CD, %eax163 andl $(~(X86_CR0_CD | X86_CR0_NW)), %eax181 orl $X86_CR0_CD, %eax
56 orl $(X86_CR0_NW | X86_CR0_CD | X86_CR0_PE), %eax188 andl $(~(X86_CR0_CD | X86_CR0_NW)), %eax
35 orl $(X86_CR0_NW | X86_CR0_CD), %eax
39 orl $(X86_CR0_NW | X86_CR0_CD), %eax
392 cr0 &= ~(X86_CR0_NW | X86_CR0_CD); in x86_enable_caches()403 cr0 |= X86_CR0_NW | X86_CR0_CD; in x86_disable_caches()412 return !(read_cr0() & X86_CR0_CD); in dcache_status()
151 cr0 = read_cr0() | X86_CR0_CD; in prepare_set()172 write_cr0(read_cr0() & ~X86_CR0_CD); in post_set()
744 cr0 = read_cr0() | X86_CR0_CD; in prepare_set()787 write_cr0(read_cr0() & ~X86_CR0_CD); in post_set()
38 #define X86_CR0_CD 0x40000000 /* Cache Disable */ macro
512 write_cr0(read_cr0() | X86_CR0_CD); in disable_caches()518 write_cr0(read_cr0() & ~X86_CR0_CD); in enable_caches()
70 #define X86_CR0_CD _BITUL(X86_CR0_CD_BIT) macro
115 write_cr0(cr0 | X86_CR0_CD); in powernow_k6_set_cpu_multiplier()
389 #define X86_CR0_CD (1UL<<30) /* Cache Disable */ macro
267 if (((vmcb12->save.cr0 & X86_CR0_CD) == 0) && (vmcb12->save.cr0 & X86_CR0_NW)) in nested_vmcb_check_save()1221 if (((cr0 & X86_CR0_CD) == 0) && (cr0 & X86_CR0_NW)) in svm_set_nested_state()
1200 svm_set_cr0(&svm->vcpu, X86_CR0_NW | X86_CR0_CD | X86_CR0_ET); in init_vmcb()1684 cr0 &= ~(X86_CR0_CD | X86_CR0_NW); in svm_set_cr0()
95 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
135 #define KVM_VM_CR0_ALWAYS_OFF (X86_CR0_NW | X86_CR0_CD)4564 cr0 = X86_CR0_NW | X86_CR0_CD | X86_CR0_ET; in vmx_vcpu_reset()7198 if (kvm_read_cr0(vcpu) & X86_CR0_CD) { in vmx_get_mt_mask()
831 unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG; in kvm_set_cr0()843 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) in kvm_set_cr0()879 if (((cr0 ^ old_cr0) & X86_CR0_CD) && in kvm_set_cr0()