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Searched refs:R_0x2a08 (Results 1 – 15 of 15) sorted by relevance

/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8723ds/hal/phydm/
H A Dphydm_pmac_tx_setting.c46 odm_set_bb_reg(dm, R_0x2a08, BIT(21)|BIT(20), rate); in phydm_start_cck_cont_tx_jgr3()
149 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x0); in phydm_stop_pmac_tx_jgr3()
160 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x0); in phydm_stop_pmac_tx_jgr3()
162 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x1); in phydm_stop_pmac_tx_jgr3()
279 odm_set_bb_reg(dm, R_0x2a08, BIT(22), tx_info->service_field_bit2); in phydm_set_cck_preamble_hdr_jgr3()
280 odm_set_bb_reg(dm, R_0x2a08, BIT(21) | BIT(20), rate); in phydm_set_cck_preamble_hdr_jgr3()
281 odm_set_bb_reg(dm, R_0x2a08, 0x1ffff, tx_info->packet_length); in phydm_set_cck_preamble_hdr_jgr3()
286 odm_set_bb_reg(dm, R_0x2a08, BIT(19), 0x1); in phydm_set_cck_preamble_hdr_jgr3()
288 odm_set_bb_reg(dm, R_0x2a08, BIT(19), 0x0); in phydm_set_cck_preamble_hdr_jgr3()
333 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x1); in phydm_set_pmac_txon_jgr3()
[all …]
H A Dphydm_mp.c227 odm_set_bb_reg(dm, R_0x2a08, BIT(18), 0x1); in phydm_mp_set_carrier_supp_jgr3()
231 odm_set_bb_reg(dm, R_0x2a08, 0x300000, 0x1); in phydm_mp_set_carrier_supp_jgr3()
233 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x1); in phydm_mp_set_carrier_supp_jgr3()
236 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x0); in phydm_mp_set_carrier_supp_jgr3()
237 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x1); in phydm_mp_set_carrier_supp_jgr3()
259 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x0); in phydm_mp_set_carrier_supp_jgr3()
263 odm_set_bb_reg(dm, R_0x2a08, BIT(18), 0x0); in phydm_mp_set_carrier_supp_jgr3()
H A Dphydm_regtable.h339 #define R_0x2a08 0x2a08 macro
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8821cs/hal/phydm/
H A Dphydm_pmac_tx_setting.c46 odm_set_bb_reg(dm, R_0x2a08, BIT(21)|BIT(20), rate); in phydm_start_cck_cont_tx_jgr3()
149 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x0); in phydm_stop_pmac_tx_jgr3()
160 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x0); in phydm_stop_pmac_tx_jgr3()
162 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x1); in phydm_stop_pmac_tx_jgr3()
279 odm_set_bb_reg(dm, R_0x2a08, BIT(22), tx_info->service_field_bit2); in phydm_set_cck_preamble_hdr_jgr3()
280 odm_set_bb_reg(dm, R_0x2a08, BIT(21) | BIT(20), rate); in phydm_set_cck_preamble_hdr_jgr3()
281 odm_set_bb_reg(dm, R_0x2a08, 0x1ffff, tx_info->packet_length); in phydm_set_cck_preamble_hdr_jgr3()
286 odm_set_bb_reg(dm, R_0x2a08, BIT(19), 0x1); in phydm_set_cck_preamble_hdr_jgr3()
288 odm_set_bb_reg(dm, R_0x2a08, BIT(19), 0x0); in phydm_set_cck_preamble_hdr_jgr3()
333 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x1); in phydm_set_pmac_txon_jgr3()
[all …]
H A Dphydm_mp.c246 odm_set_bb_reg(dm, R_0x2a08, BIT(18), 0x1); in phydm_mp_set_carrier_supp_jgr3()
250 odm_set_bb_reg(dm, R_0x2a08, 0x300000, 0x1); in phydm_mp_set_carrier_supp_jgr3()
252 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x1); in phydm_mp_set_carrier_supp_jgr3()
255 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x0); in phydm_mp_set_carrier_supp_jgr3()
256 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x1); in phydm_mp_set_carrier_supp_jgr3()
278 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x0); in phydm_mp_set_carrier_supp_jgr3()
282 odm_set_bb_reg(dm, R_0x2a08, BIT(18), 0x0); in phydm_mp_set_carrier_supp_jgr3()
H A Dphydm_regtable.h342 #define R_0x2a08 0x2a08 macro
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/hal/phydm/
H A Dphydm_pmac_tx_setting.c46 odm_set_bb_reg(dm, R_0x2a08, BIT(21)|BIT(20), rate); in phydm_start_cck_cont_tx_jgr3()
149 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x0); in phydm_stop_pmac_tx_jgr3()
160 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x0); in phydm_stop_pmac_tx_jgr3()
162 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x1); in phydm_stop_pmac_tx_jgr3()
279 odm_set_bb_reg(dm, R_0x2a08, BIT(22), tx_info->service_field_bit2); in phydm_set_cck_preamble_hdr_jgr3()
280 odm_set_bb_reg(dm, R_0x2a08, BIT(21) | BIT(20), rate); in phydm_set_cck_preamble_hdr_jgr3()
281 odm_set_bb_reg(dm, R_0x2a08, 0x1ffff, tx_info->packet_length); in phydm_set_cck_preamble_hdr_jgr3()
286 odm_set_bb_reg(dm, R_0x2a08, BIT(19), 0x1); in phydm_set_cck_preamble_hdr_jgr3()
288 odm_set_bb_reg(dm, R_0x2a08, BIT(19), 0x0); in phydm_set_cck_preamble_hdr_jgr3()
333 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x1); in phydm_set_pmac_txon_jgr3()
[all …]
H A Dphydm_mp.c232 odm_set_bb_reg(dm, R_0x2a08, BIT(18), 0x1); in phydm_mp_set_carrier_supp_jgr3()
236 odm_set_bb_reg(dm, R_0x2a08, 0x300000, 0x1); in phydm_mp_set_carrier_supp_jgr3()
238 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x1); in phydm_mp_set_carrier_supp_jgr3()
241 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x0); in phydm_mp_set_carrier_supp_jgr3()
242 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x1); in phydm_mp_set_carrier_supp_jgr3()
264 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x0); in phydm_mp_set_carrier_supp_jgr3()
268 odm_set_bb_reg(dm, R_0x2a08, BIT(18), 0x0); in phydm_mp_set_carrier_supp_jgr3()
H A Dphydm_regtable.h341 #define R_0x2a08 0x2a08 macro
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723cs/hal/phydm/
H A Dphydm_pmac_tx_setting.c46 odm_set_bb_reg(dm, R_0x2a08, BIT(21)|BIT(20), rate); in phydm_start_cck_cont_tx_jgr3()
149 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x0); in phydm_stop_pmac_tx_jgr3()
160 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x0); in phydm_stop_pmac_tx_jgr3()
162 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x1); in phydm_stop_pmac_tx_jgr3()
279 odm_set_bb_reg(dm, R_0x2a08, BIT(22), tx_info->service_field_bit2); in phydm_set_cck_preamble_hdr_jgr3()
280 odm_set_bb_reg(dm, R_0x2a08, BIT(21) | BIT(20), rate); in phydm_set_cck_preamble_hdr_jgr3()
281 odm_set_bb_reg(dm, R_0x2a08, 0x1ffff, tx_info->packet_length); in phydm_set_cck_preamble_hdr_jgr3()
286 odm_set_bb_reg(dm, R_0x2a08, BIT(19), 0x1); in phydm_set_cck_preamble_hdr_jgr3()
288 odm_set_bb_reg(dm, R_0x2a08, BIT(19), 0x0); in phydm_set_cck_preamble_hdr_jgr3()
333 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x1); in phydm_set_pmac_txon_jgr3()
[all …]
H A Dphydm_mp.c227 odm_set_bb_reg(dm, R_0x2a08, BIT(18), 0x1); in phydm_mp_set_carrier_supp_jgr3()
231 odm_set_bb_reg(dm, R_0x2a08, 0x300000, 0x1); in phydm_mp_set_carrier_supp_jgr3()
233 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x1); in phydm_mp_set_carrier_supp_jgr3()
236 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x0); in phydm_mp_set_carrier_supp_jgr3()
237 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x1); in phydm_mp_set_carrier_supp_jgr3()
259 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x0); in phydm_mp_set_carrier_supp_jgr3()
263 odm_set_bb_reg(dm, R_0x2a08, BIT(18), 0x0); in phydm_mp_set_carrier_supp_jgr3()
H A Dphydm_regtable.h331 #define R_0x2a08 0x2a08 macro
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8821cs/hal/phydm/
H A Dphydm_pmac_tx_setting.c47 odm_set_bb_reg(dm, R_0x2a08, BIT(21)|BIT(20), rate); in phydm_start_cck_cont_tx_jgr3()
150 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x0); in phydm_stop_pmac_tx_jgr3()
161 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x0); in phydm_stop_pmac_tx_jgr3()
163 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x1); in phydm_stop_pmac_tx_jgr3()
280 odm_set_bb_reg(dm, R_0x2a08, BIT(22), tx_info->service_field_bit2); in phydm_set_cck_preamble_hdr_jgr3()
281 odm_set_bb_reg(dm, R_0x2a08, BIT(21) | BIT(20), rate); in phydm_set_cck_preamble_hdr_jgr3()
282 odm_set_bb_reg(dm, R_0x2a08, 0x1ffff, tx_info->packet_length); in phydm_set_cck_preamble_hdr_jgr3()
287 odm_set_bb_reg(dm, R_0x2a08, BIT(19), 0x1); in phydm_set_cck_preamble_hdr_jgr3()
289 odm_set_bb_reg(dm, R_0x2a08, BIT(19), 0x0); in phydm_set_cck_preamble_hdr_jgr3()
334 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x1); in phydm_set_pmac_txon_jgr3()
[all …]
H A Dphydm_mp.c228 odm_set_bb_reg(dm, R_0x2a08, BIT(18), 0x1); in phydm_mp_set_carrier_supp_jgr3()
232 odm_set_bb_reg(dm, R_0x2a08, 0x300000, 0x1); in phydm_mp_set_carrier_supp_jgr3()
234 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x1); in phydm_mp_set_carrier_supp_jgr3()
237 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x0); in phydm_mp_set_carrier_supp_jgr3()
238 odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x1); in phydm_mp_set_carrier_supp_jgr3()
260 odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x0); in phydm_mp_set_carrier_supp_jgr3()
264 odm_set_bb_reg(dm, R_0x2a08, BIT(18), 0x0); in phydm_mp_set_carrier_supp_jgr3()
H A Dphydm_regtable.h331 #define R_0x2a08 0x2a08 macro