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Searched refs:R8A7795_CLK_S0D4 (Results 1 – 9 of 9) sorted by relevance

/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dr8a7795-cpg-mssr.h20 #define R8A7795_CLK_S0D4 9 macro
/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Dr8a7795-cpg-mssr.h24 #define R8A7795_CLK_S0D4 9 macro
/OK3568_Linux_fs/kernel/drivers/clk/renesas/
H A Dr8a7795-cpg-mssr.c93 DEF_FIXED("s0d4", R8A7795_CLK_S0D4, CLK_S0, 4, 1),
224 DEF_MOD("lvds", 727, R8A7795_CLK_S0D4),
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/bridge/
H A Drenesas,dw-hdmi.txt50 clocks = <&cpg CPG_CORE R8A7795_CLK_S0D4>, <&cpg CPG_MOD 729>;
/OK3568_Linux_fs/u-boot/drivers/clk/renesas/
H A Dclk-rcar-gen3.c215 DEF_FIXED("s0d4", R8A7795_CLK_S0D4, CLK_S0, 4, 1),
333 DEF_MOD("lvds", 727, R8A7795_CLK_S0D4),
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dr8a7795-h3ulcb.dts299 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
H A Dr8a7795-salvator-x.dts433 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
H A Dr8a7795.dtsi1112 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/renesas/
H A Dr8a77951.dtsi12 #define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4
1972 <&cpg CPG_CORE R8A7795_CLK_S0D4>;