xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/r8a7795-h3ulcb.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2016 Renesas Electronics Corp.
5*4882a593Smuzhiyun * Copyright (C) 2016 Cogent Embedded, Inc.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public License
8*4882a593Smuzhiyun * version 2.  This program is licensed "as is" without any warranty of any
9*4882a593Smuzhiyun * kind, whether express or implied.
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/dts-v1/;
13*4882a593Smuzhiyun#include "r8a7795.dtsi"
14*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
15*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun/ {
18*4882a593Smuzhiyun	model = "Renesas H3ULCB board based on r8a7795";
19*4882a593Smuzhiyun	compatible = "renesas,h3ulcb", "renesas,r8a7795";
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	aliases {
22*4882a593Smuzhiyun		serial0 = &scif2;
23*4882a593Smuzhiyun		ethernet0 = &avb;
24*4882a593Smuzhiyun	};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	chosen {
27*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	memory@48000000 {
31*4882a593Smuzhiyun		device_type = "memory";
32*4882a593Smuzhiyun		/* first 128MB is reserved for secure area. */
33*4882a593Smuzhiyun		reg = <0x0 0x48000000 0x0 0x38000000>;
34*4882a593Smuzhiyun	};
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun	memory@500000000 {
37*4882a593Smuzhiyun		device_type = "memory";
38*4882a593Smuzhiyun		reg = <0x5 0x00000000 0x0 0x40000000>;
39*4882a593Smuzhiyun	};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun	memory@600000000 {
42*4882a593Smuzhiyun		device_type = "memory";
43*4882a593Smuzhiyun		reg = <0x6 0x00000000 0x0 0x40000000>;
44*4882a593Smuzhiyun	};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun	memory@700000000 {
47*4882a593Smuzhiyun		device_type = "memory";
48*4882a593Smuzhiyun		reg = <0x7 0x00000000 0x0 0x40000000>;
49*4882a593Smuzhiyun	};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun	leds {
52*4882a593Smuzhiyun		compatible = "gpio-leds";
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun		led5 {
55*4882a593Smuzhiyun			gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
56*4882a593Smuzhiyun		};
57*4882a593Smuzhiyun		led6 {
58*4882a593Smuzhiyun			gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
59*4882a593Smuzhiyun		};
60*4882a593Smuzhiyun	};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun	keyboard {
63*4882a593Smuzhiyun		compatible = "gpio-keys";
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun		key-1 {
66*4882a593Smuzhiyun			linux,code = <KEY_1>;
67*4882a593Smuzhiyun			label = "SW3";
68*4882a593Smuzhiyun			wakeup-source;
69*4882a593Smuzhiyun			debounce-interval = <20>;
70*4882a593Smuzhiyun			gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
71*4882a593Smuzhiyun		};
72*4882a593Smuzhiyun	};
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun	x12_clk: x12 {
75*4882a593Smuzhiyun		compatible = "fixed-clock";
76*4882a593Smuzhiyun		#clock-cells = <0>;
77*4882a593Smuzhiyun		clock-frequency = <24576000>;
78*4882a593Smuzhiyun	};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun	reg_1p8v: regulator0 {
81*4882a593Smuzhiyun		compatible = "regulator-fixed";
82*4882a593Smuzhiyun		regulator-name = "fixed-1.8V";
83*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
84*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
85*4882a593Smuzhiyun		regulator-boot-on;
86*4882a593Smuzhiyun		regulator-always-on;
87*4882a593Smuzhiyun	};
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun	reg_3p3v: regulator1 {
90*4882a593Smuzhiyun		compatible = "regulator-fixed";
91*4882a593Smuzhiyun		regulator-name = "fixed-3.3V";
92*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
93*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
94*4882a593Smuzhiyun		regulator-boot-on;
95*4882a593Smuzhiyun		regulator-always-on;
96*4882a593Smuzhiyun	};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun	vcc_sdhi0: regulator-vcc-sdhi0 {
99*4882a593Smuzhiyun		compatible = "regulator-fixed";
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun		regulator-name = "SDHI0 Vcc";
102*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
103*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
106*4882a593Smuzhiyun		enable-active-high;
107*4882a593Smuzhiyun	};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun	vccq_sdhi0: regulator-vccq-sdhi0 {
110*4882a593Smuzhiyun		compatible = "regulator-gpio";
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun		regulator-name = "SDHI0 VccQ";
113*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
114*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun		gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
117*4882a593Smuzhiyun		gpios-states = <1>;
118*4882a593Smuzhiyun		states = <3300000 1
119*4882a593Smuzhiyun			  1800000 0>;
120*4882a593Smuzhiyun	};
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun	audio_clkout: audio-clkout {
123*4882a593Smuzhiyun		/*
124*4882a593Smuzhiyun		 * This is same as <&rcar_sound 0>
125*4882a593Smuzhiyun		 * but needed to avoid cs2000/rcar_sound probe dead-lock
126*4882a593Smuzhiyun		 */
127*4882a593Smuzhiyun		compatible = "fixed-clock";
128*4882a593Smuzhiyun		#clock-cells = <0>;
129*4882a593Smuzhiyun		clock-frequency = <11289600>;
130*4882a593Smuzhiyun	};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun	rsnd_ak4613: sound {
133*4882a593Smuzhiyun		compatible = "simple-audio-card";
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun		simple-audio-card,format = "left_j";
136*4882a593Smuzhiyun		simple-audio-card,bitclock-master = <&sndcpu>;
137*4882a593Smuzhiyun		simple-audio-card,frame-master = <&sndcpu>;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun		sndcpu: simple-audio-card,cpu {
140*4882a593Smuzhiyun			sound-dai = <&rcar_sound>;
141*4882a593Smuzhiyun		};
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun		sndcodec: simple-audio-card,codec {
144*4882a593Smuzhiyun			sound-dai = <&ak4613>;
145*4882a593Smuzhiyun		};
146*4882a593Smuzhiyun	};
147*4882a593Smuzhiyun};
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun&extal_clk {
150*4882a593Smuzhiyun	clock-frequency = <16666666>;
151*4882a593Smuzhiyun};
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun&extalr_clk {
154*4882a593Smuzhiyun	clock-frequency = <32768>;
155*4882a593Smuzhiyun};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun&pfc {
158*4882a593Smuzhiyun	pinctrl-0 = <&scif_clk_pins>;
159*4882a593Smuzhiyun	pinctrl-names = "default";
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun	scif2_pins: scif2 {
162*4882a593Smuzhiyun		groups = "scif2_data_a";
163*4882a593Smuzhiyun		function = "scif2";
164*4882a593Smuzhiyun	};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun	scif_clk_pins: scif_clk {
167*4882a593Smuzhiyun		groups = "scif_clk_a";
168*4882a593Smuzhiyun		function = "scif_clk";
169*4882a593Smuzhiyun	};
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun	i2c2_pins: i2c2 {
172*4882a593Smuzhiyun		groups = "i2c2_a";
173*4882a593Smuzhiyun		function = "i2c2";
174*4882a593Smuzhiyun	};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun	avb_pins: avb {
177*4882a593Smuzhiyun		groups = "avb_mdc";
178*4882a593Smuzhiyun		function = "avb";
179*4882a593Smuzhiyun	};
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun	sdhi0_pins: sd0 {
182*4882a593Smuzhiyun		groups = "sdhi0_data4", "sdhi0_ctrl";
183*4882a593Smuzhiyun		function = "sdhi0";
184*4882a593Smuzhiyun		power-source = <3300>;
185*4882a593Smuzhiyun	};
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun	sdhi0_pins_uhs: sd0_uhs {
188*4882a593Smuzhiyun		groups = "sdhi0_data4", "sdhi0_ctrl";
189*4882a593Smuzhiyun		function = "sdhi0";
190*4882a593Smuzhiyun		power-source = <1800>;
191*4882a593Smuzhiyun	};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun	sdhi2_pins: sd2 {
194*4882a593Smuzhiyun		groups = "sdhi2_data8", "sdhi2_ctrl";
195*4882a593Smuzhiyun		function = "sdhi2";
196*4882a593Smuzhiyun		power-source = <3300>;
197*4882a593Smuzhiyun	};
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun	sdhi2_pins_uhs: sd2_uhs {
200*4882a593Smuzhiyun		groups = "sdhi2_data8", "sdhi2_ctrl";
201*4882a593Smuzhiyun		function = "sdhi2";
202*4882a593Smuzhiyun		power-source = <1800>;
203*4882a593Smuzhiyun	};
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun	sound_pins: sound {
206*4882a593Smuzhiyun		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
207*4882a593Smuzhiyun		function = "ssi";
208*4882a593Smuzhiyun	};
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun	sound_clk_pins: sound-clk {
211*4882a593Smuzhiyun		groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
212*4882a593Smuzhiyun			 "audio_clkout_a", "audio_clkout3_a";
213*4882a593Smuzhiyun		function = "audio_clk";
214*4882a593Smuzhiyun	};
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun	usb1_pins: usb1 {
217*4882a593Smuzhiyun		groups = "usb1";
218*4882a593Smuzhiyun		function = "usb1";
219*4882a593Smuzhiyun	};
220*4882a593Smuzhiyun};
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun&scif2 {
223*4882a593Smuzhiyun	pinctrl-0 = <&scif2_pins>;
224*4882a593Smuzhiyun	pinctrl-names = "default";
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun	status = "okay";
227*4882a593Smuzhiyun};
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun&scif_clk {
230*4882a593Smuzhiyun	clock-frequency = <14745600>;
231*4882a593Smuzhiyun};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun&i2c2 {
234*4882a593Smuzhiyun	pinctrl-0 = <&i2c2_pins>;
235*4882a593Smuzhiyun	pinctrl-names = "default";
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun	status = "okay";
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun	clock-frequency = <100000>;
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun	ak4613: codec@10 {
242*4882a593Smuzhiyun		compatible = "asahi-kasei,ak4613";
243*4882a593Smuzhiyun		#sound-dai-cells = <0>;
244*4882a593Smuzhiyun		reg = <0x10>;
245*4882a593Smuzhiyun		clocks = <&rcar_sound 3>;
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun		asahi-kasei,in1-single-end;
248*4882a593Smuzhiyun		asahi-kasei,in2-single-end;
249*4882a593Smuzhiyun		asahi-kasei,out1-single-end;
250*4882a593Smuzhiyun		asahi-kasei,out2-single-end;
251*4882a593Smuzhiyun		asahi-kasei,out3-single-end;
252*4882a593Smuzhiyun		asahi-kasei,out4-single-end;
253*4882a593Smuzhiyun		asahi-kasei,out5-single-end;
254*4882a593Smuzhiyun		asahi-kasei,out6-single-end;
255*4882a593Smuzhiyun	};
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun	cs2000: clk-multiplier@4f {
258*4882a593Smuzhiyun		#clock-cells = <0>;
259*4882a593Smuzhiyun		compatible = "cirrus,cs2000-cp";
260*4882a593Smuzhiyun		reg = <0x4f>;
261*4882a593Smuzhiyun		clocks = <&audio_clkout>, <&x12_clk>;
262*4882a593Smuzhiyun		clock-names = "clk_in", "ref_clk";
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun		assigned-clocks = <&cs2000>;
265*4882a593Smuzhiyun		assigned-clock-rates = <24576000>; /* 1/1 divide */
266*4882a593Smuzhiyun	};
267*4882a593Smuzhiyun};
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun&rcar_sound {
270*4882a593Smuzhiyun	pinctrl-0 = <&sound_pins &sound_clk_pins>;
271*4882a593Smuzhiyun	pinctrl-names = "default";
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun	/* Single DAI */
274*4882a593Smuzhiyun	#sound-dai-cells = <0>;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun	/* audio_clkout0/1/2/3 */
277*4882a593Smuzhiyun	#clock-cells = <1>;
278*4882a593Smuzhiyun	clock-frequency = <11289600>;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun	status = "okay";
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun	/* update <audio_clk_b> to <cs2000> */
283*4882a593Smuzhiyun	clocks = <&cpg CPG_MOD 1005>,
284*4882a593Smuzhiyun		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
285*4882a593Smuzhiyun		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
286*4882a593Smuzhiyun		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
287*4882a593Smuzhiyun		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
288*4882a593Smuzhiyun		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
289*4882a593Smuzhiyun		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
290*4882a593Smuzhiyun		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
291*4882a593Smuzhiyun		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
292*4882a593Smuzhiyun		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
293*4882a593Smuzhiyun		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
294*4882a593Smuzhiyun		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
295*4882a593Smuzhiyun		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
296*4882a593Smuzhiyun		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
297*4882a593Smuzhiyun		 <&audio_clk_a>, <&cs2000>,
298*4882a593Smuzhiyun		 <&audio_clk_c>,
299*4882a593Smuzhiyun		 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun	rcar_sound,dai {
302*4882a593Smuzhiyun		dai0 {
303*4882a593Smuzhiyun			playback = <&ssi0 &src0 &dvc0>;
304*4882a593Smuzhiyun			capture  = <&ssi1 &src1 &dvc1>;
305*4882a593Smuzhiyun		};
306*4882a593Smuzhiyun	};
307*4882a593Smuzhiyun};
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun&sdhi0 {
310*4882a593Smuzhiyun	pinctrl-0 = <&sdhi0_pins>;
311*4882a593Smuzhiyun	pinctrl-1 = <&sdhi0_pins_uhs>;
312*4882a593Smuzhiyun	pinctrl-names = "default", "state_uhs";
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun	vmmc-supply = <&vcc_sdhi0>;
315*4882a593Smuzhiyun	vqmmc-supply = <&vccq_sdhi0>;
316*4882a593Smuzhiyun	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
317*4882a593Smuzhiyun	bus-width = <4>;
318*4882a593Smuzhiyun	sd-uhs-sdr50;
319*4882a593Smuzhiyun	status = "okay";
320*4882a593Smuzhiyun};
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun&sdhi2 {
323*4882a593Smuzhiyun	/* used for on-board 8bit eMMC */
324*4882a593Smuzhiyun	pinctrl-0 = <&sdhi2_pins>;
325*4882a593Smuzhiyun	pinctrl-1 = <&sdhi2_pins_uhs>;
326*4882a593Smuzhiyun	pinctrl-names = "default", "state_uhs";
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun	vmmc-supply = <&reg_3p3v>;
329*4882a593Smuzhiyun	vqmmc-supply = <&reg_1p8v>;
330*4882a593Smuzhiyun	bus-width = <8>;
331*4882a593Smuzhiyun	non-removable;
332*4882a593Smuzhiyun	status = "okay";
333*4882a593Smuzhiyun};
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun&ssi1 {
336*4882a593Smuzhiyun	shared-pin;
337*4882a593Smuzhiyun};
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun&wdt0 {
340*4882a593Smuzhiyun	timeout-sec = <60>;
341*4882a593Smuzhiyun	status = "okay";
342*4882a593Smuzhiyun};
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun&audio_clk_a {
345*4882a593Smuzhiyun	clock-frequency = <22579200>;
346*4882a593Smuzhiyun};
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun&avb {
349*4882a593Smuzhiyun	pinctrl-0 = <&avb_pins>;
350*4882a593Smuzhiyun	pinctrl-names = "default";
351*4882a593Smuzhiyun	renesas,no-ether-link;
352*4882a593Smuzhiyun	phy-handle = <&phy0>;
353*4882a593Smuzhiyun	status = "okay";
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun	phy0: ethernet-phy@0 {
356*4882a593Smuzhiyun		rxc-skew-ps = <1500>;
357*4882a593Smuzhiyun		reg = <0>;
358*4882a593Smuzhiyun		interrupt-parent = <&gpio2>;
359*4882a593Smuzhiyun		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
360*4882a593Smuzhiyun	};
361*4882a593Smuzhiyun};
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun&usb2_phy1 {
364*4882a593Smuzhiyun	pinctrl-0 = <&usb1_pins>;
365*4882a593Smuzhiyun	pinctrl-names = "default";
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun	status = "okay";
368*4882a593Smuzhiyun};
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun&ehci1 {
371*4882a593Smuzhiyun	status = "okay";
372*4882a593Smuzhiyun};
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun&ohci1 {
375*4882a593Smuzhiyun	status = "okay";
376*4882a593Smuzhiyun};
377