Home
last modified time | relevance | path

Searched refs:PPLL_HZ (Results 1 – 8 of 8) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk3399.h85 #define PPLL_HZ (676*MHz) macro
H A Dcru_rk3528.h18 #define PPLL_HZ (1000 * MHz) macro
H A Dcru_rk3588.h19 #define PPLL_HZ (1100 * MHz) macro
H A Dcru_rk3568.h17 #define PPLL_HZ (200 * MHz) macro
/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3399.c54 static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
1621 return DIV_TO_RATE(PPLL_HZ, div); in rk3399_i2c_get_pmuclk()
1629 src_clk_div = PPLL_HZ / hz; in rk3399_i2c_set_pmuclk()
1650 return DIV_TO_RATE(PPLL_HZ, src_clk_div); in rk3399_i2c_set_pmuclk()
1661 return DIV_TO_RATE(PPLL_HZ, div); in rk3399_pwm_get_clk()
1721 pclk_div = PPLL_HZ / PMU_PCLK_HZ - 1; in pmuclk_init()
H A Dclk_rk3528.c1906 if (priv->ppll_hz != PPLL_HZ) { in rk3528_clk_init()
1908 PPLL, PPLL_HZ); in rk3528_clk_init()
1910 priv->ppll_hz = PPLL_HZ; in rk3528_clk_init()
H A Dclk_rk3568.c489 if (priv->ppll_hz != PPLL_HZ) { in rk3568_pmuclk_probe()
492 PPLL, PPLL_HZ); in rk3568_pmuclk_probe()
494 priv->ppll_hz = PPLL_HZ; in rk3568_pmuclk_probe()
H A Dclk_rk3588.c2046 if (priv->ppll_hz != PPLL_HZ) { in rk3588_clk_init()
2048 PPLL, PPLL_HZ); in rk3588_clk_init()