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Searched refs:PLL_V0PLL (Results 1 – 9 of 9) sorted by relevance

/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3588-vehicle-serdes-display-v20.dtsi1921 assigned-clocks = <&cru PLL_V0PLL>;
1927 assigned-clock-parents = <&cru PLL_V0PLL>;
1937 assigned-clock-parents = <&cru PLL_V0PLL>;
1942 assigned-clock-parents = <&cru PLL_V0PLL>;
H A Drk3588-vehicle-serdes-display.dtsi1921 assigned-clocks = <&cru PLL_V0PLL>;
1927 assigned-clock-parents = <&cru PLL_V0PLL>;
1937 assigned-clock-parents = <&cru PLL_V0PLL>;
1942 assigned-clock-parents = <&cru PLL_V0PLL>;
H A Drk3588-pc.dtsi345 assigned-clock-parents = <0>, <0>, <&cru PLL_V0PLL>, <0>;
H A Drk3588-vehicle-serdes-display-v21.dtsi2073 assigned-clocks = <&cru PLL_V0PLL>;
2079 assigned-clock-parents = <&cru PLL_V0PLL>;
2089 assigned-clock-parents = <&cru PLL_V0PLL>;
2094 assigned-clock-parents = <&cru PLL_V0PLL>;
H A Drk3588s.dtsi4649 assigned-clock-parents = <&cru PLL_V0PLL>;
/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3588.c55 [V0PLL] = PLL(pll_rk3588, PLL_V0PLL, RK3588_PLL_CON(88),
81 RK3588_CLK_DUMP(PLL_V0PLL, "v0pll", true),
1545 case PLL_V0PLL: in rk3588_clk_get_rate()
1688 case PLL_V0PLL: in rk3588_clk_set_rate()
1931 if (parent->id == PLL_V0PLL) in rk3588_dclk_vop_set_parent()
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Drk3588-cru.h16 #define PLL_V0PLL 4 macro
/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Drk3588-cru.h16 #define PLL_V0PLL 4 macro
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-rk3588.c656 [v0pll] = PLL(pll_rk3588, PLL_V0PLL, "v0pll", mux_pll_p,