1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7#include <dt-bindings/display/rockchip_vop.h> 8 9/ { 10 11 backlight: backlight { 12 compatible = "pwm-backlight"; 13 brightness-levels = < 14 0 20 20 21 21 22 22 23 15 23 24 24 25 25 26 26 27 16 27 28 28 29 29 30 30 31 17 31 32 32 33 33 34 34 35 18 35 36 36 37 37 38 38 39 19 40 41 42 43 44 45 46 47 20 48 49 50 51 52 53 54 55 21 56 57 58 59 60 61 62 63 22 64 65 66 67 68 69 70 71 23 72 73 74 75 76 77 78 79 24 80 81 82 83 84 85 86 87 25 88 89 90 91 92 93 94 95 26 96 97 98 99 100 101 102 103 27 104 105 106 107 108 109 110 111 28 112 113 114 115 116 117 118 119 29 120 121 122 123 124 125 126 127 30 128 129 130 131 132 133 134 135 31 136 137 138 139 140 141 142 143 32 144 145 146 147 148 149 150 151 33 152 153 154 155 156 157 158 159 34 160 161 162 163 164 165 166 167 35 168 169 170 171 172 173 174 175 36 176 177 178 179 180 181 182 183 37 184 185 186 187 188 189 190 191 38 192 193 194 195 196 197 198 199 39 200 201 202 203 204 205 206 207 40 208 209 210 211 212 213 214 215 41 216 217 218 219 220 221 222 223 42 224 225 226 227 228 229 230 231 43 232 233 234 235 236 237 238 239 44 240 241 242 243 244 245 246 247 45 248 249 250 251 252 253 254 255 46 >; 47 default-brightness-level = <200>; 48 }; 49 50 vcc12v_dcin: vcc12v-dcin { 51 compatible = "regulator-fixed"; 52 regulator-name = "vcc12v_dcin"; 53 regulator-always-on; 54 regulator-boot-on; 55 regulator-min-microvolt = <12000000>; 56 regulator-max-microvolt = <12000000>; 57 }; 58 59 vcc5v0_sys: vcc5v0-sys { 60 compatible = "regulator-fixed"; 61 regulator-name = "vcc5v0_sys"; 62 regulator-always-on; 63 regulator-boot-on; 64 regulator-min-microvolt = <5000000>; 65 regulator-max-microvolt = <5000000>; 66 vin-supply = <&vcc12v_dcin>; 67 }; 68 69 vcc5v0_usbdcin: vcc5v0-usbdcin { 70 compatible = "regulator-fixed"; 71 regulator-name = "vcc5v0_usbdcin"; 72 regulator-always-on; 73 regulator-boot-on; 74 regulator-min-microvolt = <5000000>; 75 regulator-max-microvolt = <5000000>; 76 vin-supply = <&vcc12v_dcin>; 77 }; 78}; 79 80&cpu_b0 { 81 cpu-supply = <&vdd_cpu_big0_s0>; 82 mem-supply = <&vdd_cpu_big0_mem_s0>; 83}; 84 85&cpu_b2 { 86 cpu-supply = <&vdd_cpu_big1_s0>; 87 mem-supply = <&vdd_cpu_big1_mem_s0>; 88}; 89 90&cpu_l0 { 91 cpu-supply = <&vdd_cpu_lit_s0>; 92 mem-supply = <&vdd_cpu_lit_mem_s0>; 93}; 94 95&dfi { 96 status = "okay"; 97}; 98 99&dmc { 100 center-supply = <&vdd_ddr_s0>; 101 mem-supply = <&vdd_log_s0>; 102 status = "okay"; 103}; 104 105&gpu { 106 mali-supply = <&vdd_gpu_s0>; 107 mem-supply = <&vdd_gpu_mem_s0>; 108 status = "okay"; 109}; 110 111&gpu_opp_table { 112 /delete-node/ opp-198000000; 113 /delete-node/ opp-297000000; 114 /delete-node/ opp-396000000; 115 /delete-node/ opp-594000000; 116}; 117 118&iep { 119 status = "okay"; 120}; 121 122&iep_mmu { 123 status = "okay"; 124}; 125 126&jpegd { 127 status = "okay"; 128}; 129 130&jpegd_mmu { 131 status = "okay"; 132}; 133 134&jpege_ccu { 135 status = "okay"; 136}; 137 138&jpege0 { 139 status = "okay"; 140}; 141 142&jpege0_mmu { 143 status = "okay"; 144}; 145 146&jpege1 { 147 status = "okay"; 148}; 149 150&jpege1_mmu { 151 status = "okay"; 152}; 153 154&jpege2 { 155 status = "okay"; 156}; 157 158&jpege2_mmu { 159 status = "okay"; 160}; 161 162&jpege3 { 163 status = "okay"; 164}; 165 166&jpege3_mmu { 167 status = "okay"; 168}; 169 170&mpp_srv { 171 status = "okay"; 172}; 173 174&rga2 { 175 status = "okay"; 176}; 177 178&rga3_core0 { 179 status = "okay"; 180}; 181 182&rga3_0_mmu { 183 status = "okay"; 184}; 185 186&rga3_core1 { 187 status = "okay"; 188}; 189 190&rga3_1_mmu { 191 status = "okay"; 192}; 193 194&rknpu { 195 rknpu-supply = <&vdd_npu_s0>; 196 mem-supply = <&vdd_npu_mem_s0>; 197 status = "okay"; 198}; 199 200&rknpu_mmu { 201 status = "okay"; 202}; 203 204&rkvdec_ccu { 205 status = "okay"; 206}; 207 208&rkvdec0 { 209 status = "okay"; 210}; 211 212&rkvdec0_mmu { 213 status = "okay"; 214}; 215 216&rkvdec1 { 217 status = "okay"; 218}; 219 220&rkvdec1_mmu { 221 status = "okay"; 222}; 223 224&rkvenc_ccu { 225 status = "okay"; 226}; 227 228&rkvenc0 { 229 venc-supply = <&vdd_vdenc_s0>; 230 mem-supply = <&vdd_vdenc_mem_s0>; 231 status = "okay"; 232}; 233 234&rkvenc0_mmu { 235 status = "okay"; 236}; 237 238&rkvenc1 { 239 venc-supply = <&vdd_vdenc_s0>; 240 mem-supply = <&vdd_vdenc_mem_s0>; 241 status = "okay"; 242}; 243 244&rkvenc1_mmu { 245 status = "okay"; 246}; 247 248&saradc { 249 status = "okay"; 250 vref-supply = <&vcc_1v8_s0>; 251}; 252 253&tsadc { 254 status = "okay"; 255}; 256 257&u2phy0 { 258 status = "okay"; 259}; 260 261&u2phy1 { 262 status = "okay"; 263}; 264 265&u2phy2 { 266 status = "okay"; 267}; 268 269&u2phy3 { 270 status = "okay"; 271}; 272 273 274&usb_host0_ehci { 275 status = "okay"; 276}; 277 278&usb_host0_ohci { 279 status = "okay"; 280}; 281 282&usb_host1_ehci { 283 status = "okay"; 284}; 285 286&usb_host1_ohci { 287 status = "okay"; 288}; 289 290&usbdp_phy0 { 291 status = "okay"; 292}; 293 294&usbdp_phy0_dp { 295 status = "okay"; 296}; 297 298&usbdp_phy0_u3 { 299 status = "okay"; 300}; 301 302&usbdp_phy1_dp { 303 status = "okay"; 304}; 305 306&usbdp_phy1_u3 { 307 status = "okay"; 308}; 309 310&usbdrd3_0 { 311 status = "okay"; 312}; 313 314&usbdrd_dwc3_0 { 315 dr_mode = "otg"; 316 status = "okay"; 317}; 318 319&usbhost3_0 { 320 status = "okay"; 321}; 322 323&usbhost_dwc3_0 { 324 status = "okay"; 325}; 326 327&vdpu { 328 status = "okay"; 329}; 330 331&vdpu_mmu { 332 status = "okay"; 333}; 334 335&vepu { 336 status = "okay"; 337}; 338 339&vop { 340 disable-win-move; 341 assigned-clocks = <&cru DCLK_VOP0_SRC>, 342 <&cru DCLK_VOP1_SRC>, 343 <&cru DCLK_VOP2_SRC>, 344 <&cru DCLK_VOP3>; 345 assigned-clock-parents = <0>, <0>, <&cru PLL_V0PLL>, <0>; 346 status = "okay"; 347}; 348 349&vop_mmu { 350 status = "okay"; 351}; 352