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Searched refs:GEN8_MASTER_IRQ (Results 1 – 5 of 5) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/gvt/
H A Dinterrupt.c459 DEFINE_GVT_GEN8_INTEL_GVT_IRQ_INFO(master, GEN8_MASTER_IRQ);
473 if (!(vgpu_vreg(vgpu, i915_mmio_reg_offset(GEN8_MASTER_IRQ)) & in gen8_check_pending_irq()
490 if (vgpu_vreg(vgpu, i915_mmio_reg_offset(GEN8_MASTER_IRQ)) in gen8_check_pending_irq()
H A Dhandlers.c2816 MMIO_DH(GEN8_MASTER_IRQ, D_BDW_PLUS, NULL, in init_bdw_mmio_info()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/
H A Di915_irq.c1624 master_ctl = I915_READ(GEN8_MASTER_IRQ) & ~GEN8_MASTER_IRQ_CONTROL; in cherryview_irq_handler()
1645 I915_WRITE(GEN8_MASTER_IRQ, 0); in cherryview_irq_handler()
1671 I915_WRITE(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL); in cherryview_irq_handler()
2379 raw_reg_write(regs, GEN8_MASTER_IRQ, 0); in gen8_master_intr_disable()
2387 return raw_reg_read(regs, GEN8_MASTER_IRQ); in gen8_master_intr_disable()
2392 raw_reg_write(regs, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL); in gen8_master_intr_enable()
2964 I915_WRITE(GEN8_MASTER_IRQ, 0); in cherryview_irq_reset()
2965 POSTING_READ(GEN8_MASTER_IRQ); in cherryview_irq_reset()
3528 I915_WRITE(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL); in cherryview_irq_postinstall()
3529 POSTING_READ(GEN8_MASTER_IRQ); in cherryview_irq_postinstall()
H A Di915_debugfs.c446 I915_READ(GEN8_MASTER_IRQ)); in i915_interrupt_info()
526 I915_READ(GEN8_MASTER_IRQ)); in i915_interrupt_info()
H A Di915_reg.h7621 #define GEN8_MASTER_IRQ _MMIO(0x44200) macro