| /OK3568_Linux_fs/kernel/drivers/clk/mediatek/ |
| H A D | clk-mt8516.c | 527 #define GATE_TOP1(_id, _name, _parent, _shift) { \ macro
583 GATE_TOP1(CLK_TOP_THEM, "them", "ahb_infra_sel", 1),
584 GATE_TOP1(CLK_TOP_APDMA, "apdma", "ahb_infra_sel", 2),
585 GATE_TOP1(CLK_TOP_I2C0, "i2c0", "ifr_i2c0_sel", 3),
586 GATE_TOP1(CLK_TOP_I2C1, "i2c1", "ifr_i2c1_sel", 4),
587 GATE_TOP1(CLK_TOP_AUXADC1, "auxadc1", "ahb_infra_sel", 5),
588 GATE_TOP1(CLK_TOP_NFI, "nfi", "nfi1x_pad_sel", 6),
589 GATE_TOP1(CLK_TOP_NFIECC, "nfiecc", "rg_nfiecc", 7),
590 GATE_TOP1(CLK_TOP_DEBUGSYS, "debugsys", "rg_dbg_atclk", 8),
591 GATE_TOP1(CLK_TOP_PWM, "pwm", "ahb_infra_sel", 9),
[all …]
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| H A D | clk-mt8167.c | 756 #define GATE_TOP1(_id, _name, _parent, _shift) { \ macro
820 GATE_TOP1(CLK_TOP_THEM, "them", "ahb_infra_sel", 1),
821 GATE_TOP1(CLK_TOP_APDMA, "apdma", "ahb_infra_sel", 2),
822 GATE_TOP1(CLK_TOP_I2C0, "i2c0", "ifr_i2c0_sel", 3),
823 GATE_TOP1(CLK_TOP_I2C1, "i2c1", "ifr_i2c1_sel", 4),
824 GATE_TOP1(CLK_TOP_AUXADC1, "auxadc1", "ahb_infra_sel", 5),
825 GATE_TOP1(CLK_TOP_NFI, "nfi", "nfi1x_pad_sel", 6),
826 GATE_TOP1(CLK_TOP_NFIECC, "nfiecc", "rg_nfiecc", 7),
827 GATE_TOP1(CLK_TOP_DEBUGSYS, "debugsys", "rg_dbg_atclk", 8),
828 GATE_TOP1(CLK_TOP_PWM, "pwm", "ahb_infra_sel", 9),
[all …]
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| H A D | clk-mt6765.c | 494 #define GATE_TOP1(_id, _name, _parent, _shift) { \ macro
519 GATE_TOP1(CLK_TOP_ARMPLL_DIVIDER_PLL0_EN,
521 GATE_TOP1(CLK_TOP_ARMPLL_DIVIDER_PLL1_EN,
523 GATE_TOP1(CLK_TOP_ARMPLL_DIVIDER_PLL2_EN,
525 GATE_TOP1(CLK_TOP_FMEM_OCC_DRC_EN, "drc_en", "univpll2_d2", 6),
526 GATE_TOP1(CLK_TOP_USB20_48M_EN, "usb20_48m_en", "usb20_48m_div", 8),
527 GATE_TOP1(CLK_TOP_UNIVPLL_48M_EN, "univpll_48m_en", "univ_48m_div", 9),
528 GATE_TOP1(CLK_TOP_F_UFS_MP_SAP_CFG_EN, "ufs_sap", "f_f26m_ck", 12),
529 GATE_TOP1(CLK_TOP_F_BIST2FPC_EN, "bist2fpc", "f_bist2fpc_ck", 16),
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| H A D | clk-mt7622.c | 79 #define GATE_TOP1(_id, _name, _parent, _shift) { \ macro
450 GATE_TOP1(CLK_TOP_A1SYS_HP_DIV_PD, "a1sys_div_pd", "a1sys_div", 0),
451 GATE_TOP1(CLK_TOP_A2SYS_HP_DIV_PD, "a2sys_div_pd", "a2sys_div", 16),
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| H A D | clk-mt2712.c | 969 #define GATE_TOP1(_id, _name, _parent, _shift) { \ macro
989 GATE_TOP1(CLK_TOP_NFI2X_EN, "nfi2x_en", "nfi2x_sel", 0),
990 GATE_TOP1(CLK_TOP_NFIECC_EN, "nfiecc_en", "nfiecc_sel", 1),
991 GATE_TOP1(CLK_TOP_NFI1X_CK_EN, "nfi1x_ck_en", "nfi2x_sel", 2),
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