Searched refs:CCR1 (Results 1 – 7 of 7) sorted by relevance
| /OK3568_Linux_fs/u-boot/arch/sh/include/asm/ |
| H A D | cpu_sh7269.h | 5 #define CCR1 0xFFFC1000 macro
6 #define CCR CCR1
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| H A D | cpu_sh7203.h | 5 #define CCR1 0xFFFC1000 macro
6 #define CCR CCR1
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| H A D | cpu_sh7264.h | 5 #define CCR1 0xFFFC1000 macro
6 #define CCR CCR1
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| /OK3568_Linux_fs/u-boot/board/renesas/rsk7269/ |
| H A D | lowlevel_init.S | 94 CCR1_A: .long CCR1
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| /OK3568_Linux_fs/u-boot/board/renesas/rsk7203/ |
| H A D | lowlevel_init.S | 108 CCR1_A: .long CCR1
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| /OK3568_Linux_fs/u-boot/board/renesas/rsk7264/ |
| H A D | lowlevel_init.S | 114 CCR1_A: .long CCR1
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| /OK3568_Linux_fs/kernel/drivers/char/pcmcia/ |
| H A D | synclink_cs.c | 269 #define CCR1 0x2d macro
2951 write_reg(info, CHB + CCR1, 0x17); in enable_auxclk()
2997 val = read_reg(info, CHA + CCR1) | (BIT2 | BIT1 | BIT0); in loopback_enable()
2998 write_reg(info, CHA + CCR1, val); in loopback_enable()
3111 write_reg(info, CHA + CCR1, val); in hdlc_mode()
3438 write_reg(info, CHA + CCR1, 0x1f); in async_mode()
3561 set_reg_bits(info, CHA + CCR1, BIT3); in tx_set_idle()
3563 clear_reg_bits(info, CHA + CCR1, BIT3); in tx_set_idle()
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