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/OK3568_Linux_fs/kernel/arch/powerpc/perf/
H A Dgeneric-compat-pmu.c97 #define C(x) PERF_COUNT_HW_CACHE_##x macro
104 static u64 generic_compat_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
105 [ C(L1D) ] = {
106 [ C(OP_READ) ] = {
107 [ C(RESULT_ACCESS) ] = 0,
108 [ C(RESULT_MISS) ] = 0,
110 [ C(OP_WRITE) ] = {
111 [ C(RESULT_ACCESS) ] = 0,
112 [ C(RESULT_MISS) ] = 0,
114 [ C(OP_PREFETCH) ] = {
[all …]
H A Dpower8-pmu.c249 #define C(x) PERF_COUNT_HW_CACHE_##x macro
256 static u64 power8_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
257 [ C(L1D) ] = {
258 [ C(OP_READ) ] = {
259 [ C(RESULT_ACCESS) ] = PM_LD_REF_L1,
260 [ C(RESULT_MISS) ] = PM_LD_MISS_L1,
262 [ C(OP_WRITE) ] = {
263 [ C(RESULT_ACCESS) ] = 0,
264 [ C(RESULT_MISS) ] = PM_ST_MISS_L1,
266 [ C(OP_PREFETCH) ] = {
[all …]
H A Dpower10-pmu.c272 #define C(x) PERF_COUNT_HW_CACHE_##x macro
279 static u64 power10_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
280 [C(L1D)] = {
281 [C(OP_READ)] = {
282 [C(RESULT_ACCESS)] = PM_LD_REF_L1,
283 [C(RESULT_MISS)] = PM_LD_MISS_L1,
285 [C(OP_WRITE)] = {
286 [C(RESULT_ACCESS)] = 0,
287 [C(RESULT_MISS)] = PM_ST_MISS_L1,
289 [C(OP_PREFETCH)] = {
[all …]
H A Dpower9-pmu.c308 #define C(x) PERF_COUNT_HW_CACHE_##x macro
315 static u64 power9_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
316 [ C(L1D) ] = {
317 [ C(OP_READ) ] = {
318 [ C(RESULT_ACCESS) ] = PM_LD_REF_L1,
319 [ C(RESULT_MISS) ] = PM_LD_MISS_L1_FIN,
321 [ C(OP_WRITE) ] = {
322 [ C(RESULT_ACCESS) ] = 0,
323 [ C(RESULT_MISS) ] = PM_ST_MISS_L1,
325 [ C(OP_PREFETCH) ] = {
[all …]
H A De6500-pmu.c28 #define C(x) PERF_COUNT_HW_CACHE_##x macro
35 static int e6500_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
36 [C(L1D)] = {
38 [C(OP_READ)] = { 27, 222 },
39 [C(OP_WRITE)] = { 28, 223 },
40 [C(OP_PREFETCH)] = { 29, 0 },
42 [C(L1I)] = {
44 [C(OP_READ)] = { 2, 254 },
45 [C(OP_WRITE)] = { -1, -1 },
46 [C(OP_PREFETCH)] = { 37, 0 },
[all …]
H A De500-pmu.c27 #define C(x) PERF_COUNT_HW_CACHE_##x macro
34 static int e500_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
39 [C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */
40 [C(OP_READ)] = { 27, 0 },
41 [C(OP_WRITE)] = { 28, 0 },
42 [C(OP_PREFETCH)] = { 29, 0 },
44 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
45 [C(OP_READ)] = { 2, 60 },
46 [C(OP_WRITE)] = { -1, -1 },
47 [C(OP_PREFETCH)] = { 0, 0 },
[all …]
/OK3568_Linux_fs/kernel/arch/arc/include/asm/
H A Dperf_event.h123 #define C(_x) PERF_COUNT_HW_CACHE_##_x macro
126 static const unsigned arc_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
127 [C(L1D)] = {
128 [C(OP_READ)] = {
129 [C(RESULT_ACCESS)] = PERF_COUNT_ARC_LDC,
130 [C(RESULT_MISS)] = PERF_COUNT_ARC_DCLM,
132 [C(OP_WRITE)] = {
133 [C(RESULT_ACCESS)] = PERF_COUNT_ARC_STC,
134 [C(RESULT_MISS)] = PERF_COUNT_ARC_DCSM,
136 [C(OP_PREFETCH)] = {
[all …]
/OK3568_Linux_fs/kernel/arch/x86/events/zhaoxin/
H A Dcore.c51 [C(L1D)] = {
52 [C(OP_READ)] = {
53 [C(RESULT_ACCESS)] = 0x0042,
54 [C(RESULT_MISS)] = 0x0538,
56 [C(OP_WRITE)] = {
57 [C(RESULT_ACCESS)] = 0x0043,
58 [C(RESULT_MISS)] = 0x0562,
60 [C(OP_PREFETCH)] = {
61 [C(RESULT_ACCESS)] = -1,
62 [C(RESULT_MISS)] = -1,
[all …]
/OK3568_Linux_fs/yocto/meta-openembedded/meta-oe/recipes-support/hddtemp/hddtemp/
H A Dhddtemp.db6 # a temperature sensor (you can set the unit to C or F).
46 "ExcelStor Technology J3.0" 194 C "ExcelStor Technology 3xy (xy GB)"
47 "ExcelStor Technology J6.0" 194 C "ExcelStor Technology 6xy (xy GB)"
48 "ExcelStor Technology J680" 194 C "ExcelStor Technology J680 (80 GB)"
49 "ExcelStor Technology J860" 194 C "ExcelStor Technology J860 (60 GB)"
50 "ExcelStor Technology J880" 194 C "ExcelStor Technology J880 (80 GB)"
57 "FUJITSU MHM2100AT" 0 C "Fujitsu MHM2100AT"
59 "FUJITSU MHN2150AT" 194 C "Fujitsu MHN2150AT"
60 "FUJITSU MHN2200AT" 194 C "Fujitsu MHN2200AT"
61 "FUJITSU MHN2300AT" 194 C "Fujitsu MHN2300AT"
[all …]
/OK3568_Linux_fs/kernel/arch/sh/kernel/cpu/sh4a/
H A Dperf_event.c109 #define C(x) PERF_COUNT_HW_CACHE_##x macro
116 [ C(L1D) ] = {
117 [ C(OP_READ) ] = {
118 [ C(RESULT_ACCESS) ] = 0x0031,
119 [ C(RESULT_MISS) ] = 0x0032,
121 [ C(OP_WRITE) ] = {
122 [ C(RESULT_ACCESS) ] = 0x0039,
123 [ C(RESULT_MISS) ] = 0x003a,
125 [ C(OP_PREFETCH) ] = {
126 [ C(RESULT_ACCESS) ] = 0,
[all …]
/OK3568_Linux_fs/kernel/arch/sh/kernel/cpu/sh4/
H A Dperf_event.c84 #define C(x) PERF_COUNT_HW_CACHE_##x macro
91 [ C(L1D) ] = {
92 [ C(OP_READ) ] = {
93 [ C(RESULT_ACCESS) ] = 0x0001,
94 [ C(RESULT_MISS) ] = 0x0004,
96 [ C(OP_WRITE) ] = {
97 [ C(RESULT_ACCESS) ] = 0x0002,
98 [ C(RESULT_MISS) ] = 0x0005,
100 [ C(OP_PREFETCH) ] = {
101 [ C(RESULT_ACCESS) ] = 0,
[all …]
/OK3568_Linux_fs/kernel/arch/arm/kernel/
H A Dperf_event_v7.c179 [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
180 [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
181 [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
182 [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
184 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS,
185 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
187 [C(LL)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS,
188 [C(LL)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_A8_PERFCTR_L2_CACHE_REFILL,
189 [C(LL)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS,
190 [C(LL)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_A8_PERFCTR_L2_CACHE_REFILL,
[all …]
/OK3568_Linux_fs/kernel/arch/x86/events/intel/
H A Dcore.c437 [ C(L1D ) ] = {
438 [ C(OP_READ) ] = {
439 [ C(RESULT_ACCESS) ] = 0x81d0, /* MEM_INST_RETIRED.ALL_LOADS */
440 [ C(RESULT_MISS) ] = 0x151, /* L1D.REPLACEMENT */
442 [ C(OP_WRITE) ] = {
443 [ C(RESULT_ACCESS) ] = 0x82d0, /* MEM_INST_RETIRED.ALL_STORES */
444 [ C(RESULT_MISS) ] = 0x0,
446 [ C(OP_PREFETCH) ] = {
447 [ C(RESULT_ACCESS) ] = 0x0,
448 [ C(RESULT_MISS) ] = 0x0,
[all …]
H A Dp6.c28 [ C(L1D) ] = {
29 [ C(OP_READ) ] = {
30 [ C(RESULT_ACCESS) ] = 0x0043, /* DATA_MEM_REFS */
31 [ C(RESULT_MISS) ] = 0x0045, /* DCU_LINES_IN */
33 [ C(OP_WRITE) ] = {
34 [ C(RESULT_ACCESS) ] = 0,
35 [ C(RESULT_MISS) ] = 0x0f29, /* L2_LD:M:E:S:I */
37 [ C(OP_PREFETCH) ] = {
38 [ C(RESULT_ACCESS) ] = 0,
39 [ C(RESULT_MISS) ] = 0,
[all …]
H A Dknc.c26 [ C(L1D) ] = {
27 [ C(OP_READ) ] = {
32 [ C(RESULT_ACCESS) ] = ARCH_PERFMON_EVENTSEL_INT,
34 [ C(RESULT_MISS) ] = 0x0003, /* DATA_READ_MISS */
36 [ C(OP_WRITE) ] = {
37 [ C(RESULT_ACCESS) ] = 0x0001, /* DATA_WRITE */
38 [ C(RESULT_MISS) ] = 0x0004, /* DATA_WRITE_MISS */
40 [ C(OP_PREFETCH) ] = {
41 [ C(RESULT_ACCESS) ] = 0x0011, /* L1_DATA_PF1 */
42 [ C(RESULT_MISS) ] = 0x001c, /* L1_DATA_PF1_MISS */
[all …]
/OK3568_Linux_fs/kernel/arch/x86/events/amd/
H A Dcore.c26 [ C(L1D) ] = {
27 [ C(OP_READ) ] = {
28 [ C(RESULT_ACCESS) ] = 0x0040, /* Data Cache Accesses */
29 [ C(RESULT_MISS) ] = 0x0141, /* Data Cache Misses */
31 [ C(OP_WRITE) ] = {
32 [ C(RESULT_ACCESS) ] = 0,
33 [ C(RESULT_MISS) ] = 0,
35 [ C(OP_PREFETCH) ] = {
36 [ C(RESULT_ACCESS) ] = 0x0267, /* Data Prefetcher :attempts */
37 [ C(RESULT_MISS) ] = 0x0167, /* Data Prefetcher :cancelled */
[all …]
/OK3568_Linux_fs/kernel/arch/sparc/kernel/
H A Dperf_event.c147 #define C(x) PERF_COUNT_HW_CACHE_##x macro
221 [C(L1D)] = {
222 [C(OP_READ)] = {
223 [C(RESULT_ACCESS)] = { 0x09, PIC_LOWER, },
224 [C(RESULT_MISS)] = { 0x09, PIC_UPPER, },
226 [C(OP_WRITE)] = {
227 [C(RESULT_ACCESS)] = { 0x0a, PIC_LOWER },
228 [C(RESULT_MISS)] = { 0x0a, PIC_UPPER },
230 [C(OP_PREFETCH)] = {
231 [C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
[all …]
/OK3568_Linux_fs/kernel/arch/mips/kernel/
H A Dperf_event_mipsxx.c74 #define C(x) PERF_COUNT_HW_CACHE_##x macro
1019 [C(L1D)] = {
1026 [C(OP_READ)] = {
1027 [C(RESULT_ACCESS)] = { 0x0a, CNTR_EVEN, T },
1028 [C(RESULT_MISS)] = { 0x0b, CNTR_EVEN | CNTR_ODD, T },
1030 [C(OP_WRITE)] = {
1031 [C(RESULT_ACCESS)] = { 0x0a, CNTR_EVEN, T },
1032 [C(RESULT_MISS)] = { 0x0b, CNTR_EVEN | CNTR_ODD, T },
1035 [C(L1I)] = {
1036 [C(OP_READ)] = {
[all …]
/OK3568_Linux_fs/kernel/arch/nds32/include/asm/
H A Dpmu.h14 #define C(_x) PERF_COUNT_HW_CACHE_##_x macro
244 [C(L1D)] = {
245 [C(OP_READ)] = {
246 [C(RESULT_ACCESS)] =
248 [C(RESULT_MISS)] =
251 [C(OP_WRITE)] = {
252 [C(RESULT_ACCESS)] =
254 [C(RESULT_MISS)] =
257 [C(OP_PREFETCH)] = {
258 [C(RESULT_ACCESS)] =
[all …]
/OK3568_Linux_fs/kernel/tools/testing/selftests/bpf/progs/
H A Dtest_verif_scale3.c20 #define C do { \ in balancer_ingress() macro
26 #define C30 C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C; in balancer_ingress()
H A Dtest_verif_scale2.c20 #define C do { \ in balancer_ingress() macro
26 #define C30 C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C; in balancer_ingress()
H A Dtest_verif_scale1.c20 #define C do { \ in balancer_ingress() macro
26 #define C30 C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C; in balancer_ingress()
/OK3568_Linux_fs/kernel/arch/riscv/kernel/
H A Dperf_event.c52 #define C(x) PERF_COUNT_HW_CACHE_##x macro
56 [C(L1D)] = {
57 [C(OP_READ)] = {
58 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
59 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
61 [C(OP_WRITE)] = {
62 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
63 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
65 [C(OP_PREFETCH)] = {
66 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
[all …]
/OK3568_Linux_fs/external/security/librkcrypto/test/c_mode/
H A Dhash_md5.c86 uint32_t X[16], A, B, C, D; in mbedtls_md5_process() local
114 C = ctx->state[2]; in mbedtls_md5_process()
119 P( A, B, C, D, 0, 7, 0xD76AA478 ); in mbedtls_md5_process()
120 P( D, A, B, C, 1, 12, 0xE8C7B756 ); in mbedtls_md5_process()
121 P( C, D, A, B, 2, 17, 0x242070DB ); in mbedtls_md5_process()
122 P( B, C, D, A, 3, 22, 0xC1BDCEEE ); in mbedtls_md5_process()
123 P( A, B, C, D, 4, 7, 0xF57C0FAF ); in mbedtls_md5_process()
124 P( D, A, B, C, 5, 12, 0x4787C62A ); in mbedtls_md5_process()
125 P( C, D, A, B, 6, 17, 0xA8304613 ); in mbedtls_md5_process()
126 P( B, C, D, A, 7, 22, 0xFD469501 ); in mbedtls_md5_process()
[all …]
H A Dhash_sha1.c87 uint32_t temp, W[16], A, B, C, D, E; in mbedtls_sha1_process() local
122 C = ctx->state[2]; in mbedtls_sha1_process()
129 P( A, B, C, D, E, W[0] ); in mbedtls_sha1_process()
130 P( E, A, B, C, D, W[1] ); in mbedtls_sha1_process()
131 P( D, E, A, B, C, W[2] ); in mbedtls_sha1_process()
132 P( C, D, E, A, B, W[3] ); in mbedtls_sha1_process()
133 P( B, C, D, E, A, W[4] ); in mbedtls_sha1_process()
134 P( A, B, C, D, E, W[5] ); in mbedtls_sha1_process()
135 P( E, A, B, C, D, W[6] ); in mbedtls_sha1_process()
136 P( D, E, A, B, C, W[7] ); in mbedtls_sha1_process()
[all …]

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