| /rk3399_ARM-atf/plat/amd/versal2/pm_service/ |
| H A D | pm_svc_main.c | 111 int ret; in request_cpu_pwrdwn() local 116 …ret = psci_stop_other_cores(plat_my_core_pos(), (unsigned int)PWRDWN_WAIT_TIMEOUT, raise_pwr_down_… in request_cpu_pwrdwn() 117 if (ret != (int)PSCI_E_SUCCESS) { in request_cpu_pwrdwn() 132 enum pm_ret_status ret; in ipi_fiq_handler() local 159 ret = pm_get_callbackdata(payload, ARRAY_SIZE(payload), 0, 0); in ipi_fiq_handler() 160 if (ret != PM_RET_SUCCESS) { in ipi_fiq_handler() 161 payload[0] = (uint32_t) ret; in ipi_fiq_handler() 234 int32_t ret; in pm_register_sgi() local 238 ret = 0; in pm_register_sgi() 243 ret = -EBUSY; in pm_register_sgi() [all …]
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| /rk3399_ARM-atf/plat/renesas/rcar_gen5/ |
| H A D | plat_pm_scmi.c | 98 int ret; in rcar_scmi_cpuon() local 107 ret = scmi_pwr_state_set(scmi_handle, in rcar_scmi_cpuon() 109 if (ret != SCMI_E_QUEUED && ret != SCMI_E_SUCCESS) { in rcar_scmi_cpuon() 111 ret); in rcar_scmi_cpuon() 124 int ret; in rcar_scmi_cpuoff() local 145 ret = scmi_pwr_state_set(scmi_handle, in rcar_scmi_cpuoff() 147 if (ret != SCMI_E_QUEUED && ret != SCMI_E_SUCCESS) { in rcar_scmi_cpuoff() 149 ret); in rcar_scmi_cpuoff() 159 int ret; in rcar_scmi_sys_shutdown() local 161 ret = scmi_sys_pwr_state_set(scmi_handle, in rcar_scmi_sys_shutdown() [all …]
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| /rk3399_ARM-atf/plat/mediatek/drivers/spm/ |
| H A D | mt_spm_vcorefs_smc.c | 25 uint64_t ret = VCOREFS_E_NOT_SUPPORTED; in mtk_vcorefs_handler() local 31 ret = spm_vcorefs_plat_init(x2, x3, &val); in mtk_vcorefs_handler() 35 ret = spm_vcorefs_plat_kick(); in mtk_vcorefs_handler() 38 ret = spm_vcorefs_get_opp_type(&val); in mtk_vcorefs_handler() 42 ret = spm_vcorefs_get_fw_type(&val); in mtk_vcorefs_handler() 46 ret = spm_vcorefs_get_vcore_uv(x2, &val); in mtk_vcorefs_handler() 50 ret = spm_vcorefs_get_dram_freq(x2, &val); in mtk_vcorefs_handler() 54 ret = spm_vcorefs_get_vcore_opp_num(&val); in mtk_vcorefs_handler() 58 ret = spm_vcorefs_get_dram_opp_num(&val); in mtk_vcorefs_handler() 62 ret = spm_vcorefs_get_vcore_info(x2, &val); in mtk_vcorefs_handler() [all …]
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| /rk3399_ARM-atf/plat/xilinx/zynqmp/pm_service/ |
| H A D | pm_api_ioctl.c | 209 enum pm_ret_status ret; in pm_ioctl_sd_dll_reset() local 224 ret = pm_mmio_write(ZYNQMP_SD_DLL_CTRL, mask, val, flag); in pm_ioctl_sd_dll_reset() 225 if (ret != PM_RET_SUCCESS) { in pm_ioctl_sd_dll_reset() 226 return ret; in pm_ioctl_sd_dll_reset() 235 ret = pm_mmio_write(ZYNQMP_SD_DLL_CTRL, mask, 0, flag); in pm_ioctl_sd_dll_reset() 238 ret = PM_RET_ERROR_ARGS; in pm_ioctl_sd_dll_reset() 242 return ret; in pm_ioctl_sd_dll_reset() 264 enum pm_ret_status ret; in pm_ioctl_sd_set_tapdelay() local 277 ret = pm_mmio_read(ZYNQMP_SD_DLL_CTRL, &val, flag); in pm_ioctl_sd_set_tapdelay() 278 if (ret != PM_RET_SUCCESS) { in pm_ioctl_sd_set_tapdelay() [all …]
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| /rk3399_ARM-atf/services/std_svc/sdei/ |
| H A D | sdei_main.c | 279 int ret; in sdei_event_routing_set() local 284 ret = validate_flags(flags, mpidr); in sdei_event_routing_set() 285 if (ret != 0) in sdei_event_routing_set() 286 return ret; in sdei_event_routing_set() 302 ret = SDEI_EINVAL; in sdei_event_routing_set() 307 ret = SDEI_EDENY; in sdei_event_routing_set() 331 return ret; in sdei_event_routing_set() 341 int ret; in sdei_event_register() local 352 ret = validate_flags(flags, mpidr); in sdei_event_register() 353 if (ret != 0) in sdei_event_register() [all …]
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| /rk3399_ARM-atf/plat/mediatek/drivers/apusys/devapc/ |
| H A D | apusys_dapc_v1.c | 19 enum apusys_apc_err_status ret = APUSYS_APC_OK; in set_apusys_dapc_v1() local 27 ret += cfg(i, DOMAIN_0, dapc[i].d0_permission); in set_apusys_dapc_v1() 28 ret += cfg(i, DOMAIN_1, dapc[i].d1_permission); in set_apusys_dapc_v1() 29 ret += cfg(i, DOMAIN_2, dapc[i].d2_permission); in set_apusys_dapc_v1() 30 ret += cfg(i, DOMAIN_3, dapc[i].d3_permission); in set_apusys_dapc_v1() 31 ret += cfg(i, DOMAIN_4, dapc[i].d4_permission); in set_apusys_dapc_v1() 32 ret += cfg(i, DOMAIN_5, dapc[i].d5_permission); in set_apusys_dapc_v1() 33 ret += cfg(i, DOMAIN_6, dapc[i].d6_permission); in set_apusys_dapc_v1() 34 ret += cfg(i, DOMAIN_7, dapc[i].d7_permission); in set_apusys_dapc_v1() 35 ret += cfg(i, DOMAIN_8, dapc[i].d8_permission); in set_apusys_dapc_v1() [all …]
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| /rk3399_ARM-atf/drivers/auth/mbedtls/ |
| H A D | mbedtls_x509_parser.c | 74 int oid_len, ret, is_critical; in get_ext() local 93 ret = mbedtls_asn1_get_tag(&p, end, &len, in get_ext() 96 if (ret != 0) { in get_ext() 102 ret = mbedtls_asn1_get_tag(&p, end_ext_data, &extn_oid.len, in get_ext() 104 if (ret != 0) { in get_ext() 112 ret = mbedtls_asn1_get_bool(&p, end_ext_data, &is_critical); in get_ext() 113 if ((ret != 0) && (ret != MBEDTLS_ERR_ASN1_UNEXPECTED_TAG)) { in get_ext() 121 ret = mbedtls_asn1_get_tag(&p, end_ext_data, &len, in get_ext() 123 if ((ret != 0) || ((p + len) != end_ext_data)) { in get_ext() 192 int ret; in cert_parse() local [all …]
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| /rk3399_ARM-atf/tools/encrypt_fw/src/ |
| H A D | encrypt.c | 31 int bytes, enc_len = 0, i, j, ret = 0; in gcm_encrypt() local 73 ret = fseek(op_file, sizeof(struct fw_enc_hdr), SEEK_SET); in gcm_encrypt() 74 if (ret) { in gcm_encrypt() 82 ret = -1; in gcm_encrypt() 86 ret = EVP_EncryptInit_ex(ctx, EVP_aes_256_gcm(), NULL, NULL, NULL); in gcm_encrypt() 87 if (ret != 1) { in gcm_encrypt() 89 ret = -1; in gcm_encrypt() 93 ret = EVP_EncryptInit_ex(ctx, NULL, NULL, key, iv); in gcm_encrypt() 94 if (ret != 1) { in gcm_encrypt() 100 ret = EVP_EncryptUpdate(ctx, enc_data, &enc_len, data, bytes); in gcm_encrypt() [all …]
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| /rk3399_ARM-atf/drivers/mtd/nand/ |
| H A D | spi_nand.c | 65 int ret; in spi_nand_update_cfg() local 75 ret = spi_nand_write_reg(SPI_NAND_REG_CFG, cfg); in spi_nand_update_cfg() 76 if (ret == 0) { in spi_nand_update_cfg() 80 return ret; in spi_nand_update_cfg() 108 int ret; in spi_nand_wait_ready() local 112 ret = spi_nand_read_reg(SPI_NAND_REG_STATUS, status); in spi_nand_wait_ready() 113 if (ret != 0) { in spi_nand_wait_ready() 114 return ret; in spi_nand_wait_ready() 130 int ret; in spi_nand_reset() local 136 ret = spi_mem_exec_op(&op); in spi_nand_reset() [all …]
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| /rk3399_ARM-atf/drivers/nxp/auth/csf_hdr_parser/ |
| H A D | csf_hdr_parser.c | 53 int ret = 0; in deploy_rotpk_hash_table() local 68 ret = hash_init(algo, &ctx); in deploy_rotpk_hash_table() 69 if (ret != 0) { in deploy_rotpk_hash_table() 74 ret = hash_update(algo, ctx, (uint8_t *)((uint8_t *)srk_buffer), in deploy_rotpk_hash_table() 76 if (ret != 0) { in deploy_rotpk_hash_table() 81 ret = hash_final(algo, ctx, hash, digest_size); in deploy_rotpk_hash_table() 82 if (ret != 0) { in deploy_rotpk_hash_table() 109 ret = hash_init(algo, &ctx); in deploy_rotpk_hash_table() 110 if (ret != 0) { in deploy_rotpk_hash_table() 115 ret = hash_update(algo, ctx, srktbl[i].pkey, srktbl[i].key_len); in deploy_rotpk_hash_table() [all …]
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| /rk3399_ARM-atf/drivers/st/pmic/ |
| H A D | stm32mp_pmic2.c | 125 int ret; in initialize_pmic_i2c() local 131 ret = dt_pmic2_i2c_config(&i2c_info, &i2c_init, &i2c_addr); in initialize_pmic_i2c() 132 if (ret < 0) { in initialize_pmic_i2c() 133 ERROR("I2C configuration failed %d\n", ret); in initialize_pmic_i2c() 137 if (ret != 0) { in initialize_pmic_i2c() 156 ret = stm32_i2c_init(i2c, &i2c_init); in initialize_pmic_i2c() 157 if (ret != 0) { in initialize_pmic_i2c() 159 i2c->i2c_base_addr, ret); in initialize_pmic_i2c() 207 int ret; in pmic2_get_voltage() local 210 ret = stpmic2_regulator_get_prop(pmic2, regul->id, STPMIC2_BYPASS); in pmic2_get_voltage() [all …]
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| /rk3399_ARM-atf/plat/mediatek/mt8183/drivers/sspm/ |
| H A D | sspm.c | 63 int ret = 0; in sspm_ipi_check_ack() local 67 ret = -EINPROGRESS; in sspm_ipi_check_ack() 70 ret = -EINPROGRESS; in sspm_ipi_check_ack() 73 ret = -EINVAL; in sspm_ipi_check_ack() 76 return ret; in sspm_ipi_check_ack() 81 int ret = 0; in sspm_ipi_send_non_blocking() local 83 ret = sspm_ipi_check_ack(id); in sspm_ipi_send_non_blocking() 84 if (ret) in sspm_ipi_send_non_blocking() 85 return ret; in sspm_ipi_send_non_blocking() 107 int ret = 0; in sspm_ipi_recv_non_blocking() local [all …]
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| /rk3399_ARM-atf/drivers/arm/css/scp/ |
| H A D | css_pm_scmi.c | 130 int ret; in css_scp_suspend() local 139 ret = scmi_sys_pwr_state_set( in css_scp_suspend() 142 if (ret != SCMI_E_SUCCESS) { in css_scp_suspend() 144 ret); in css_scp_suspend() 180 ret = scmi_pwr_state_set(scmi_handles[channel_id], in css_scp_suspend() 183 if (ret != SCMI_E_SUCCESS) { in css_scp_suspend() 185 ret); in css_scp_suspend() 198 int ret; in css_scp_off() local 222 ret = scmi_pwr_state_set(scmi_handles[channel_id], in css_scp_off() 224 if (ret != SCMI_E_QUEUED && ret != SCMI_E_SUCCESS) { in css_scp_off() [all …]
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| H A D | css_sds.c | 20 int ret; in css_scp_boot_image_xfer() local 23 ret = sds_init(SDS_SCP_AP_REGION_ID); in css_scp_boot_image_xfer() 24 if (ret != SDS_OK) { in css_scp_boot_image_xfer() 31 ret = sds_struct_write(SDS_SCP_AP_REGION_ID, in css_scp_boot_image_xfer() 35 if (ret != SDS_OK) in css_scp_boot_image_xfer() 38 ret = sds_struct_write(SDS_SCP_AP_REGION_ID, in css_scp_boot_image_xfer() 42 if (ret != SDS_OK) in css_scp_boot_image_xfer() 47 ret = sds_struct_write(SDS_SCP_AP_REGION_ID, in css_scp_boot_image_xfer() 51 if (ret != SDS_OK) in css_scp_boot_image_xfer() 67 int ret, retry = CSS_SCP_READY_10US_RETRIES; in css_scp_boot_ready() local [all …]
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| /rk3399_ARM-atf/plat/marvell/armada/common/ |
| H A D | mrvl_sip_svc.c | 82 u_register_t ret, read, x5 = x1; in mrvl_sip_smc_handler() local 111 ret = mvebu_cp110_comphy_power_on(x1, x2, x3, x5); in mrvl_sip_smc_handler() 112 SMC_RET1(handle, ret); in mrvl_sip_smc_handler() 115 ret = mvebu_cp110_comphy_power_off(x1, x2, x3); in mrvl_sip_smc_handler() 116 SMC_RET1(handle, ret); in mrvl_sip_smc_handler() 119 ret = mvebu_cp110_comphy_is_pll_locked(x1, x2); in mrvl_sip_smc_handler() 120 SMC_RET1(handle, ret); in mrvl_sip_smc_handler() 123 ret = mvebu_cp110_comphy_xfi_rx_training(x1, x2); in mrvl_sip_smc_handler() 124 SMC_RET1(handle, ret); in mrvl_sip_smc_handler() 127 ret = mvebu_cp110_comphy_digital_reset(x1, x2, x3, x4); in mrvl_sip_smc_handler() [all …]
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| /rk3399_ARM-atf/plat/socionext/synquacer/ |
| H A D | sq_io_storage.c | 162 int ret; in sq_update_fip_spec() local 164 ret = mmap_add_dynamic_region(PLAT_SQ_BOOTIDX_BASE, PLAT_SQ_BOOTIDX_BASE, in sq_update_fip_spec() 166 if (ret) { in sq_update_fip_spec() 167 return ret; in sq_update_fip_spec() 184 int ret; in sq_io_memmap_setup() local 186 ret = sq_update_fip_spec(); in sq_io_memmap_setup() 187 if (ret) { in sq_io_memmap_setup() 188 return ret; in sq_io_memmap_setup() 191 ret = mmap_add_dynamic_region(sq_fip_spec.offset, sq_fip_spec.offset, in sq_io_memmap_setup() 193 if (ret) { in sq_io_memmap_setup() [all …]
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| /rk3399_ARM-atf/drivers/brcm/mdio/ |
| H A D | mdio.c | 35 int ret; in mdio_op() local 38 ret = mdio_op_status(0U); in mdio_op() 39 if (ret != 0) { in mdio_op() 55 ret = mdio_op_status(1U); in mdio_op() 56 if (ret != 0) { in mdio_op() 61 ret = mmio_read_32(CMIC_MIIM_READ_DATA) & MDIO_READ_DATA_MASK; in mdio_op() 64 return ret; in mdio_op() 69 int ret; in mdio_write() local 71 ret = mdio_op(busid, phyid, reg, val, MDIO_CTRL_WRITE_OP); in mdio_write() 72 if (ret == -1) { in mdio_write() [all …]
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| /rk3399_ARM-atf/drivers/nxp/crypto/caam/src/ |
| H A D | caam.c | 112 int ret; in configure_jr() local 133 ret = sec_jr_lib_init(); in configure_jr() 134 if (ret != 0) { in configure_jr() 150 return ret; in configure_jr() 176 int ret = 0; in config_sec_block() local 184 return ret; in config_sec_block() 213 ret = configure_jr(DEFAULT_JR); in config_sec_block() 214 if (ret != 0) { in config_sec_block() 223 ret = hw_rng_instantiate(); in config_sec_block() 224 if (ret != 0) { in config_sec_block() [all …]
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| H A D | rng.c | 99 int ret = 0; in instantiate_rng() local 110 ret = run_descriptor_jr(jobdesc); in instantiate_rng() 111 if (ret != 0) { in instantiate_rng() 113 ret = -1; in instantiate_rng() 115 return ret; in instantiate_rng() 132 int ret = 0; in hw_rng_generate() local 145 ret = cnstr_rng_jobdesc(jobdesc->desc, state_handle, in hw_rng_generate() 147 if (ret != 0) { in hw_rng_generate() 149 ret = -1; in hw_rng_generate() 153 ret = run_descriptor_jr(jobdesc); in hw_rng_generate() [all …]
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| /rk3399_ARM-atf/services/spd/opteed/ |
| H A D | opteed_main.c | 301 int ret; in add_coreboot_node() local 313 ret = fdt_begin_node(fdt, "firmware"); in add_coreboot_node() 314 if (ret) in add_coreboot_node() 315 return ret; in add_coreboot_node() 317 ret = fdt_property(fdt, "ranges", NULL, 0); in add_coreboot_node() 318 if (ret) in add_coreboot_node() 319 return ret; in add_coreboot_node() 321 ret = fdt_begin_node(fdt, "coreboot"); in add_coreboot_node() 322 if (ret) in add_coreboot_node() 323 return ret; in add_coreboot_node() [all …]
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| /rk3399_ARM-atf/plat/hisilicon/hikey960/ |
| H A D | hikey960_boardid.c | 99 int ret; in get_value() local 101 ret = get_adc(channel, value); in get_value() 102 if (ret) in get_value() 103 return ret; in get_value() 106 ret = ((*value & HKADC_VALID_VALUE) * HKADC_VREF_1V8) / HKADC_ACCURACY; in get_value() 107 *value = ret; in get_value() 113 int ret; in adcin_data_remap() local 116 ret = BOARDID_VALUE0; in adcin_data_remap() 118 ret = BOARDID_VALUE1; in adcin_data_remap() 120 ret = BOARDID_VALUE2; in adcin_data_remap() [all …]
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| /rk3399_ARM-atf/plat/nvidia/tegra/drivers/bpmp_ipc/ |
| H A D | intf.c | 86 bool ret = true; in tegra_bpmp_slave_acked() local 90 ret = false; in tegra_bpmp_slave_acked() 95 return ret; in tegra_bpmp_slave_acked() 172 int32_t ret = 0; in tegra_bpmp_ipc_send_req_atomic() local 191 ret = tegra_bpmp_wait_for_slave_ack(); in tegra_bpmp_ipc_send_req_atomic() 192 if (ret < 0) { in tegra_bpmp_ipc_send_req_atomic() 193 ERROR("%s: wait for slave failed (%d)\n", __func__, ret); in tegra_bpmp_ipc_send_req_atomic() 194 return ret; in tegra_bpmp_ipc_send_req_atomic() 208 ret = tegra_bpmp_free_master(); in tegra_bpmp_ipc_send_req_atomic() 209 if (ret < 0) { in tegra_bpmp_ipc_send_req_atomic() [all …]
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| /rk3399_ARM-atf/plat/allwinner/common/ |
| H A D | sunxi_prepare_dtb.c | 17 int ret; in sunxi_prepare_dtb() local 23 ret = fdt_open_into(fdt, fdt, 0x10000); in sunxi_prepare_dtb() 24 if (ret < 0) { in sunxi_prepare_dtb() 25 ERROR("Preparing devicetree at %p: error %d\n", fdt, ret); in sunxi_prepare_dtb() 40 ret = fdt_add_cpu_idle_states(fdt, sunxi_idle_states); in sunxi_prepare_dtb() 41 if (ret < 0) { in sunxi_prepare_dtb() 42 WARN("Failed to add idle states to DT: %d\n", ret); in sunxi_prepare_dtb() 46 ret = fdt_pack(fdt); in sunxi_prepare_dtb() 47 if (ret < 0) { in sunxi_prepare_dtb() 49 fdt, ret); in sunxi_prepare_dtb()
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| /rk3399_ARM-atf/drivers/st/regulator/ |
| H A D | regulator_core.c | 138 int ret; in regulator_enable() local 142 ret = __regulator_set_state(rdev, STATE_ENABLE); in regulator_enable() 146 return ret; in regulator_enable() 157 int ret; in regulator_disable() local 165 ret = __regulator_set_state(rdev, STATE_DISABLE); in regulator_disable() 169 return ret; in regulator_disable() 180 int ret; in regulator_is_enabled() local 192 ret = rdev->desc->ops->get_state(rdev->desc); in regulator_is_enabled() 193 if (ret < 0) { in regulator_is_enabled() 195 rdev->desc->node_name, ret); in regulator_is_enabled() [all …]
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| /rk3399_ARM-atf/plat/socionext/uniphier/ |
| H A D | uniphier_bl2_setup.c | 44 int ret; in bl2_plat_arch_setup() local 51 ret = uniphier_io_setup(uniphier_soc, uniphier_mem_base); in bl2_plat_arch_setup() 52 if (ret) { in bl2_plat_arch_setup() 54 plat_error_handler(ret); in bl2_plat_arch_setup() 115 int ret; in bl2_plat_preload_setup() local 117 ret = mmap_add_dynamic_region(buf_base, buf_base, in bl2_plat_preload_setup() 120 if (ret) in bl2_plat_preload_setup() 121 plat_error_handler(ret); in bl2_plat_preload_setup() 132 int ret; in bl2_plat_handle_pre_image_load() local 136 ret = mmap_add_dynamic_region(image_info->image_base, in bl2_plat_handle_pre_image_load() [all …]
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