| /rk3399_ARM-atf/drivers/arm/css/scmi/ |
| H A D | scmi_pwr_dmn_proto.c | 23 int ret; in scmi_pwr_state_set() local
47 SCMI_PAYLOAD_RET_VAL1(mbx_mem->payload, ret); in scmi_pwr_state_set()
53 return ret; in scmi_pwr_state_set()
64 int ret; in scmi_pwr_state_get() local
81 SCMI_PAYLOAD_RET_VAL2(mbx_mem->payload, ret, *scmi_pwr_state); in scmi_pwr_state_get()
87 return ret; in scmi_pwr_state_get()
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| H A D | scmi_ap_core_proto.c | 22 int ret; in scmi_ap_core_set_reset_addr() local
40 SCMI_PAYLOAD_RET_VAL1(mbx_mem->payload, ret); in scmi_ap_core_set_reset_addr()
46 return ret; in scmi_ap_core_set_reset_addr()
56 int ret; in scmi_ap_core_get_reset_addr() local
73 SCMI_PAYLOAD_RET_VAL4(mbx_mem->payload, ret, lo_addr, hi_addr, *attr); in scmi_ap_core_get_reset_addr()
80 return ret; in scmi_ap_core_get_reset_addr()
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| /rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/arch/aarch64/ |
| H A D | nrd_helper.S | 58 ret
73 ret
84 ret
91 ret
98 ret
105 ret
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| /rk3399_ARM-atf/plat/amlogic/gxl/ |
| H A D | gxl_pm.c | 52 int ret; in gxl_system_reset() local
62 ret = aml_scpi_sys_power_state(SCPI_SYSTEM_REBOOT); in gxl_system_reset()
64 if (ret != 0) { in gxl_system_reset()
65 ERROR("BL31: PSCI_SYSTEM_RESET: SCP error: %i\n", ret); in gxl_system_reset()
82 int ret; in gxl_system_off() local
84 ret = aml_scpi_sys_power_state(SCPI_SYSTEM_SHUTDOWN); in gxl_system_off()
86 if (ret != 0) { in gxl_system_off()
87 ERROR("BL31: PSCI_SYSTEM_OFF: SCP error %i\n", ret); in gxl_system_off()
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| /rk3399_ARM-atf/plat/amlogic/g12a/ |
| H A D | g12a_pm.c | 52 int ret; in g12a_system_reset() local
62 ret = aml_scpi_sys_power_state(SCPI_SYSTEM_REBOOT); in g12a_system_reset()
64 if (ret != 0) { in g12a_system_reset()
65 ERROR("BL31: PSCI_SYSTEM_RESET: SCP error: %i\n", ret); in g12a_system_reset()
82 int ret; in g12a_system_off() local
84 ret = aml_scpi_sys_power_state(SCPI_SYSTEM_SHUTDOWN); in g12a_system_off()
86 if (ret != 0) { in g12a_system_off()
87 ERROR("BL31: PSCI_SYSTEM_OFF: SCP error %i\n", ret); in g12a_system_off()
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| /rk3399_ARM-atf/common/ |
| H A D | image_decompress.c | 45 int ret; in image_decompress() local
66 ret = decompressor(&compressed_image_base, compressed_image_size, in image_decompress()
69 if (ret) { in image_decompress()
70 ERROR("Failed to decompress image (err=%d)\n", ret); in image_decompress()
71 return ret; in image_decompress()
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| /rk3399_ARM-atf/plat/marvell/armada/common/aarch64/ |
| H A D | marvell_helpers.S | 55 ret
124 ret
139 ret
150 ret
162 ret
172 ret
182 ret
204 ret
258 ret
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| /rk3399_ARM-atf/plat/qti/common/src/ |
| H A D | qti_interrupt_svc.c | 49 int ret; in qti_interrupt_svc_init() local
63 ret = register_interrupt_type_handler(INTR_TYPE_EL3, in qti_interrupt_svc_init()
65 assert(ret == 0); in qti_interrupt_svc_init()
67 return ret; in qti_interrupt_svc_init()
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| /rk3399_ARM-atf/drivers/allwinner/ |
| H A D | sunxi_rsb.c | 55 int ret = rsb_wait_bit(desc, RSB_CTRL, BIT(7)); in rsb_wait_stat() local
57 if (ret) in rsb_wait_stat()
58 return ret; in rsb_wait_stat()
78 int ret; in rsb_read() local
85 ret = rsb_wait_stat("RSB: read command"); in rsb_read()
86 if (ret) in rsb_read()
87 return ret; in rsb_read()
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| /rk3399_ARM-atf/drivers/st/ddr/ |
| H A D | stm32mp1_ram.c | 56 int ret; in stm32mp1_ddr_setup() local
82 ret = stm32mp_ddr_dt_get_info(fdt, node, &config.info); in stm32mp1_ddr_setup()
83 if (ret < 0) { in stm32mp1_ddr_setup()
84 return ret; in stm32mp1_ddr_setup()
87 ret = stm32mp_ddr_dt_get_param(fdt, node, param, ARRAY_SIZE(param), (uintptr_t)&config); in stm32mp1_ddr_setup()
88 if (ret < 0) { in stm32mp1_ddr_setup()
89 return ret; in stm32mp1_ddr_setup()
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| /rk3399_ARM-atf/plat/mediatek/include/drivers/pmic/ |
| H A D | mt6359p_set_lowpower.h | 70 int ret = 0; in pmic_wrap_update_bits() local
72 ret = pwrap_read(reg, &orig); in pmic_wrap_update_bits()
73 if (ret < 0) in pmic_wrap_update_bits()
74 return ret; in pmic_wrap_update_bits()
79 ret = pwrap_write(reg, orig); in pmic_wrap_update_bits()
80 return ret; in pmic_wrap_update_bits()
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| /rk3399_ARM-atf/tools/nxp/create_pbl/ |
| H A D | byte_swap.c | 44 int ret = FAILURE; in do_byteswap() local
87 ret = SUCCESS; in do_byteswap()
90 return ret; in do_byteswap()
96 int ret = 0; in main() local
110 ret = do_byteswap(fp); in main()
112 return ret; in main()
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| /rk3399_ARM-atf/plat/arm/board/juno/ |
| H A D | juno_bl1_setup.c | 32 int ret; in is_watchdog_reset()
35 ret = sds_init(SDS_SCP_AP_REGION_ID); in is_watchdog_reset()
36 if (ret != SDS_OK) { in is_watchdog_reset()
41 ret = sds_struct_read(SDS_SCP_AP_REGION_ID, in is_watchdog_reset()
47 if (ret != SDS_OK) { in is_watchdog_reset()
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| /rk3399_ARM-atf/drivers/nxp/crypto/caam/src/ |
| H A D | hw_key_blob.c | 35 int ret = 0; in get_hw_unq_key_blob_hw() local
68 ret = cnstr_hw_encap_blob_jobdesc(jobdesc->desc, key_data, key_sz, in get_hw_unq_key_blob_hw()
73 ret = run_descriptor_jr(jobdesc); in get_hw_unq_key_blob_hw()
74 if (ret != 0) { in get_hw_unq_key_blob_hw()
84 return ret; in get_hw_unq_key_blob_hw()
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| /rk3399_ARM-atf/plat/intel/soc/common/ |
| H A D | socfpga_dt.c | 33 int ret = 0; in socfpga_dt_open_and_check() local
36 ret = fdt_check_header((void *)dt_addr); in socfpga_dt_open_and_check()
38 if (ret != 0) { in socfpga_dt_open_and_check()
40 return ret; in socfpga_dt_open_and_check()
58 return ret; in socfpga_dt_open_and_check()
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| /rk3399_ARM-atf/plat/nvidia/tegra/include/drivers/ |
| H A D | smmu.h | 43 uint32_t ret = 0U; in tegra_smmu_read_32() local
47 ret = mmio_read_32(TEGRA_SMMU0_BASE + (uint64_t)off); in tegra_smmu_read_32()
53 ret = mmio_read_32(TEGRA_SMMU1_BASE + (uint64_t)off); in tegra_smmu_read_32()
59 ret = mmio_read_32(TEGRA_SMMU2_BASE + (uint64_t)off); in tegra_smmu_read_32()
63 return ret; in tegra_smmu_read_32()
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| /rk3399_ARM-atf/plat/arm/board/n1sdp/ |
| H A D | n1sdp_bl2_setup.c | 61 int ret; in bl2_platform_setup() local
64 ret = sds_init(SDS_SCP_AP_REGION_ID); in bl2_platform_setup()
65 if (ret != SDS_OK) { in bl2_platform_setup()
70 ret = sds_struct_read(SDS_SCP_AP_REGION_ID, in bl2_platform_setup()
76 if (ret != SDS_OK) { in bl2_platform_setup()
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| /rk3399_ARM-atf/plat/rockchip/common/ |
| H A D | plat_pm.c | 218 int ret; in rockchip_pwr_domain_off() local
231 ret = rockchip_soc_hlvl_pwr_dm_off(lvl, lvl_state); in rockchip_pwr_domain_off()
232 if (ret == PSCI_E_NOT_SUPPORTED) in rockchip_pwr_domain_off()
245 int ret; in rockchip_pwr_domain_suspend() local
267 ret = rockchip_soc_hlvl_pwr_dm_suspend(lvl, lvl_state); in rockchip_pwr_domain_suspend()
268 if (ret == PSCI_E_NOT_SUPPORTED) in rockchip_pwr_domain_suspend()
282 int ret; in rockchip_pwr_domain_on_finish() local
288 ret = rockchip_soc_hlvl_pwr_dm_on_finish(lvl, lvl_state); in rockchip_pwr_domain_on_finish()
289 if (ret == PSCI_E_NOT_SUPPORTED) in rockchip_pwr_domain_on_finish()
319 int ret; in rockchip_pwr_domain_suspend_finish() local
[all …]
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| /rk3399_ARM-atf/plat/hisilicon/hikey960/ |
| H A D | hikey960_el3_spmc_logical_sp.c | 29 uint64_t ret; in handle_ffa_direct_request() local
33 ret = FFA_MSG_SEND_DIRECT_RESP_SMC32; in handle_ffa_direct_request()
35 ret = FFA_MSG_SEND_DIRECT_RESP_SMC64; in handle_ffa_direct_request()
50 SMC_RET8(handle, ret, 0, 0, x4, 0, 0, 0, 0); in handle_ffa_direct_request()
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| /rk3399_ARM-atf/plat/mediatek/common/lpm_v2/ |
| H A D | mt_lp_rq.c | 37 int ret; in mt_lp_resource_request() local
55 ret = mt_lp_resource_update_and_set(this); in mt_lp_resource_request()
57 return ret; in mt_lp_resource_request()
64 int ret; in mt_lp_resource_release() local
78 ret = mt_lp_resource_update_and_set(this); in mt_lp_resource_release()
80 return ret; in mt_lp_resource_release()
225 unsigned int ret = MT_LP_RQ_STA_OK; in mt_lp_resource_update_and_set() local
232 ret = mt_lp_rm_do_hwctrl(PLAT_AP_SPM_RESOURCE_REQUEST_UPDATE, 1, in mt_lp_resource_update_and_set()
235 if (ret) in mt_lp_resource_update_and_set()
236 ret = MT_LP_RQ_STA_BAD; in mt_lp_resource_update_and_set()
[all …]
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| /rk3399_ARM-atf/plat/amlogic/common/ |
| H A D | aml_thermal.c | 18 uint16_t ret; in aml_thermal_unknown() local
21 aml_scpi_efuse_read(&ret, 0, 2); in aml_thermal_unknown()
22 modules_initialized = ret; in aml_thermal_unknown()
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| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/ |
| H A D | mt_spm_stats.c | 47 uint64_t ret; in mt_spm_get_lp_stat() local
54 ret = stat->record[index].count; in mt_spm_get_lp_stat()
57 ret = stat->record[index].duration; in mt_spm_get_lp_stat()
60 ret = 0; in mt_spm_get_lp_stat()
64 return ret; in mt_spm_get_lp_stat()
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| /rk3399_ARM-atf/plat/marvell/armada/a8k/common/aarch64/ |
| H A D | plat_helpers.S | 27 ret
48 ret
56 ret
71 ret
111 ret
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| /rk3399_ARM-atf/plat/intel/soc/agilex5/soc/ |
| H A D | agilex5_ddr.c | 316 int ret; in agilex5_ddr_init() local
379 ret = get_mem_technology(&io96b_ctrl); in agilex5_ddr_init()
380 if (ret != 0) { in agilex5_ddr_init()
382 return ret; in agilex5_ddr_init()
385 ret = get_mem_width_info(&io96b_ctrl); in agilex5_ddr_init()
386 if (ret != 0) { in agilex5_ddr_init()
388 return ret; in agilex5_ddr_init()
391 ret = ecc_enable_status(&io96b_ctrl); in agilex5_ddr_init()
392 if (ret != 0) { in agilex5_ddr_init()
394 return ret; in agilex5_ddr_init()
[all …]
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| /rk3399_ARM-atf/plat/mediatek/drivers/apusys/mt8196/ |
| H A D | apusys_devapc.c | 298 int32_t ret = APUSYS_APC_OK; in apusys_devapc_ao_init() local
302 ret = SET_APUSYS_DAPC_V1(APUSYS_CTRL_DAPC_AO, set_slave_ao_ctrl_apc); in apusys_devapc_ao_init()
304 if (ret) { in apusys_devapc_ao_init()
306 return ret; in apusys_devapc_ao_init()
315 return ret; in apusys_devapc_ao_init()
320 int32_t ret = APUSYS_APC_OK; in apusys_devapc_rcx_init() local
324 ret = SET_APUSYS_DAPC_V1(APUSYS_CTRL_DAPC_RCX, set_slave_rcx_ctrl_apc); in apusys_devapc_rcx_init()
325 if (ret) { in apusys_devapc_rcx_init()
327 return ret; in apusys_devapc_rcx_init()
336 return ret; in apusys_devapc_rcx_init()
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