1 /*
2 * Copyright (c) 2025, Mediatek Inc. All rights reserved.
3 * SPDX-License-Identifier: BSD-3-Clause
4 */
5
6 #ifndef MT6359P_SET_LOWPOWER_H
7 #define MT6359P_SET_LOWPOWER_H
8
9 #include <stdint.h>
10
11 #include "mt6359p_lowpower_reg.h"
12 #include <pmic_wrap_init_common.h>
13
14 #define OP_MODE_MU (0)
15 #define OP_MODE_LP (1)
16
17 #define HW_OFF (0)
18 #define HW_ON (0)
19 #define HW_LP (1)
20
21 enum {
22 HW0 = 0,
23 HW1,
24 HW2,
25 HW3,
26 HW4,
27 HW5,
28 HW6,
29 HW7,
30 HW8,
31 HW9,
32 HW10,
33 HW11,
34 HW12,
35 HW13,
36 HW14,
37 };
38
39 #define PMIC_BUCK_SET_LP(_chip, _name, _user, _en, _mode, _cfg) \
40 { \
41 pmic_wrap_update_bits(_chip##_RG_BUCK_##_name##_##_user##_OP_CFG_ADDR, \
42 1 << _user, \
43 (_cfg & 0x1) ? 1 << _user : 0); \
44 pmic_wrap_update_bits(_chip##_RG_BUCK_##_name##_##_user##_OP_MODE_ADDR, \
45 1 << _user, \
46 _mode ? 1 << _user : 0); \
47 pmic_wrap_update_bits(_chip##_RG_BUCK_##_name##_##_user##_OP_EN_ADDR, \
48 1 << _user, \
49 _en ? 1 << _user : 0); \
50 }
51
52 #define PMIC_LDO_SET_LP(_chip, _name, _user, _en, _mode, _cfg) \
53 { \
54 if (_user <= HW2) { \
55 pmic_wrap_update_bits(_chip##_RG_LDO_##_name##_OP_MODE_ADDR, \
56 1 << (_user + _chip##_RG_LDO_##_name##_OP_MODE_SHIFT), \
57 _mode ? 1 << (_user + _chip##_RG_LDO_##_name##_OP_MODE_SHIFT) : 0); \
58 } \
59 pmic_wrap_update_bits(_chip##_RG_LDO_##_name##_##_user##_OP_CFG_ADDR, \
60 1 << _user, \
61 (_cfg & 0x1) ? 1 << _user : 0); \
62 pmic_wrap_update_bits(_chip##_RG_LDO_##_name##_##_user##_OP_EN_ADDR, \
63 1 << _user, \
64 _en ? 1 << _user : 0); \
65 }
66
pmic_wrap_update_bits(uint32_t reg,uint32_t mask,uint32_t val)67 static inline int pmic_wrap_update_bits(uint32_t reg, uint32_t mask, uint32_t val)
68 {
69 uint32_t orig = 0;
70 int ret = 0;
71
72 ret = pwrap_read(reg, &orig);
73 if (ret < 0)
74 return ret;
75
76 orig &= ~mask;
77 orig |= val & mask;
78
79 ret = pwrap_write(reg, orig);
80 return ret;
81 }
82
83 #endif /* MT6359P_MT6359P_SET_LOWPOWER_H */
84