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/rk3399_rockchip-uboot/drivers/video/
H A Dfsl_dcu_fb.c227 int i; in reset_total_layers() local
229 for (i = 0; i < DCU_LAYER_MAX_NUM; i++) { in reset_total_layers()
230 dcu_write32(&regs->ctrldescl[i][0], 0); in reset_total_layers()
231 dcu_write32(&regs->ctrldescl[i][1], 0); in reset_total_layers()
232 dcu_write32(&regs->ctrldescl[i][2], 0); in reset_total_layers()
233 dcu_write32(&regs->ctrldescl[i][3], 0); in reset_total_layers()
234 dcu_write32(&regs->ctrldescl[i][4], 0); in reset_total_layers()
235 dcu_write32(&regs->ctrldescl[i][5], 0); in reset_total_layers()
236 dcu_write32(&regs->ctrldescl[i][6], 0); in reset_total_layers()
237 dcu_write32(&regs->ctrldescl[i][7], 0); in reset_total_layers()
[all …]
H A Datmel_lcdfb.c71 int i; in lcd_logo_set_cmap() local
76 for (i = 0; i < BMP_LOGO_COLORS; ++i) { in lcd_logo_set_cmap()
77 colreg = bmp_logo_palette[i]; in lcd_logo_set_cmap()
106 int i; in lcd_set_cmap() local
108 for (i = 0; i < colors; ++i) { in lcd_set_cmap()
109 struct bmp_color_table_entry cte = bmp->color_table[i]; in lcd_set_cmap()
110 lcd_setcolreg(i, cte.red, cte.green, cte.blue); in lcd_set_cmap()
/rk3399_rockchip-uboot/doc/
H A DREADME.imx51 U-Boot for Freescale i.MX5x
4 i.MX5x SoCs.
9 1.1 CONFIG_MX51_PLL_ERRATA: Workaround for i.MX51 PLL errata.
10 This option should be enabled by all boards using the i.MX51 silicon
12 The PLL's in the i.MX51 processor can go out of lock due to a metastable
28 natural MAC byte order (i.e. MSB first).
H A DREADME.imx251 U-Boot for Freescale i.MX25
3 This file contains information for the port of U-Boot to the Freescale i.MX25
10 natural MAC byte order (i.e. MSB first).
H A DREADME.imx271 U-Boot for Freescale i.MX27
3 This file contains information for the port of U-Boot to the Freescale i.MX27
10 reversed MAC byte order (i.e. LSB first).
/rk3399_rockchip-uboot/drivers/mmc/
H A Dsdhci-cadence.c96 int ret, i; in sdhci_cdns_phy_init() local
98 for (i = 0; i < ARRAY_SIZE(sdhci_cdns_phy_cfgs); i++) { in sdhci_cdns_phy_init()
100 sdhci_cdns_phy_cfgs[i].property, NULL); in sdhci_cdns_phy_init()
105 sdhci_cdns_phy_cfgs[i].addr, in sdhci_cdns_phy_init()
H A Dtegra_mmc.c162 int flags, i; in tegra_mmc_send_cmd_bounced() local
217 for (i = 0; i < retry; i++) { in tegra_mmc_send_cmd_bounced()
227 if (i == retry) { in tegra_mmc_send_cmd_bounced()
248 for (i = 0; i < 4; i++) { in tegra_mmc_send_cmd_bounced()
250 (&priv->reg->rspreg3 - i); in tegra_mmc_send_cmd_bounced()
251 cmd->response[i] = readl(offset) << 8; in tegra_mmc_send_cmd_bounced()
253 if (i != 3) { in tegra_mmc_send_cmd_bounced()
254 cmd->response[i] |= in tegra_mmc_send_cmd_bounced()
258 i, cmd->response[i]); in tegra_mmc_send_cmd_bounced()
261 for (i = 0; i < retry; i++) { in tegra_mmc_send_cmd_bounced()
[all …]
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dsdram_rk3328.h55 #define CRU_CLKSELS_CON(i) (CRU_CLKSEL_CON_BASE + ((i) * 4)) argument
57 #define CRU_CLKGATE_CON(i) (CRU_CLKGATE_CON_BASE + ((i) * 4)) argument
59 #define CRU_CLKSFTRST_CON(i) (CRU_CLKSFTRST_CON_BASE + ((i) * 4)) argument
/rk3399_rockchip-uboot/board/freescale/mpc8641hpcn/
H A Dmpc8641hpcn.c172 u8 i, go_bit, rd_clks; in get_board_sys_clk() local
190 i = in_8(pixis_base + PIXIS_AUX); in get_board_sys_clk()
192 i = in_8(pixis_base + PIXIS_SPD); in get_board_sys_clk()
194 i = in_8(pixis_base + PIXIS_SPD); in get_board_sys_clk()
197 i &= 0x07; in get_board_sys_clk()
199 switch (i) { in get_board_sys_clk()
/rk3399_rockchip-uboot/drivers/gpio/
H A Dadi_gpio2.c50 #define map_entry(m, i) reserved_##m##_map[gpio_bank(i)] argument
51 #define is_reserved(m, i, e) (map_entry(m, i) & gpio_bit(i)) argument
52 #define reserve(m, i) (map_entry(m, i) |= gpio_bit(i)) argument
53 #define unreserve(m, i) (map_entry(m, i) &= ~gpio_bit(i)) argument
/rk3399_rockchip-uboot/arch/x86/cpu/broadwell/
H A Dcpu.c341 int i; in configure_pch_power_sharing() local
359 for (i = 0; i < 3; i++) { in configure_pch_power_sharing()
362 pmsync &= ~(0x1f << (i * 8)); in configure_pch_power_sharing()
363 pmsync |= (level & 0x1f) << (i * 8); in configure_pch_power_sharing()
377 for (i = 1; i < 4; i++) { in configure_pch_power_sharing()
380 pmsync2 &= ~(0x1f << (i * 8)); in configure_pch_power_sharing()
381 pmsync2 |= (level & 0x1f) << (i * 8); in configure_pch_power_sharing()
462 int i; in configure_mca() local
474 for (i = 0; i < num_banks; i++) in configure_mca()
475 msr_write(MSR_IA32_MC0_STATUS + (i * 4), msr); in configure_mca()
/rk3399_rockchip-uboot/tools/dtoc/
H A Ddtb_platdata.py218 i = 0
222 while i < len(val):
223 phandle = fdt_util.fdt32_to_cpu(val[i])
236 i += 1 + num_args
323 i = 0
328 while i < len(val):
329 addr = fdt_util.fdt_cells_to_cpu(val[i:], reg.na)
330 i += na
331 size = fdt_util.fdt_cells_to_cpu(val[i:], reg.ns)
332 i += ns
[all …]
/rk3399_rockchip-uboot/lib/zlib/
H A Dtrees.c329 # define SEPARATOR(i, last, width) \ argument
330 ((i) == (last)? "\n};\n\n" : \
331 ((i) % (width) == (width)-1 ? ",\n" : ", "))
336 int i; in gen_trees_header() local
343 for (i = 0; i < L_CODES+2; i++) { in gen_trees_header()
344 fprintf(header, "{{%3u},{%3u}}%s", static_ltree[i].Code, in gen_trees_header()
345 static_ltree[i].Len, SEPARATOR(i, L_CODES+1, 5)); in gen_trees_header()
349 for (i = 0; i < D_CODES; i++) { in gen_trees_header()
350 fprintf(header, "{{%2u},{%2u}}%s", static_dtree[i].Code, in gen_trees_header()
351 static_dtree[i].Len, SEPARATOR(i, D_CODES-1, 5)); in gen_trees_header()
[all …]
/rk3399_rockchip-uboot/drivers/i2c/
H A Di2c-uclass.c22 int i; in i2c_dump_msgs() local
24 for (i = 0; i < nmsgs; i++) { in i2c_dump_msgs()
25 struct i2c_msg *m = &msg[i]; in i2c_dump_msgs()
73 int i; in i2c_read_bytewise() local
75 for (i = 0; i < len; i++) { in i2c_read_bytewise()
76 if (i2c_setup_offset(chip, offset + i, offset_buf, msg)) in i2c_read_bytewise()
82 ptr->buf = &buffer[i]; in i2c_read_bytewise()
102 int i; in i2c_write_bytewise() local
104 for (i = 0; i < len; i++) { in i2c_write_bytewise()
105 if (i2c_setup_offset(chip, offset + i, buf, msg)) in i2c_write_bytewise()
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/
H A Drk_mini_dump.c171 int i, regno; in md_get_region() local
177 for (i = 0; i < regno; i++) { in md_get_region()
178 mdr = &minidump_table->entry[i]; in md_get_region()
192 unsigned int i = 0, error = 0, phdr_off = 0, strtbl_off = 0; in rk_dump_elf64_image_phdr() local
347 for (i = 1; i < MAX_NUM_ENTRIES; i++) { in rk_dump_elf64_image_phdr()
383 i, phdr->p_vaddr, shdr->sh_addr, shdr->sh_addralign); in rk_dump_elf64_image_phdr()
414 i, phdr->p_filesz, phdr->p_memsz, shdr->sh_size); in rk_dump_elf64_image_phdr()
445 if (ehdr->e_phnum != i) in rk_dump_elf64_image_phdr()
446 ehdr->e_phnum = i; in rk_dump_elf64_image_phdr()
463 int i; in rk_dump_elf32_image_phdr() local
[all …]
/rk3399_rockchip-uboot/board/aristainetos/
H A Daristainetos-v2.c258 int i; in setup_spi() local
266 for (i = 0; i < 4; i++) in setup_spi()
267 enable_spi_clk(true, i); in setup_spi()
334 int i, j; in rotate_logo_one() local
336 for (i = 0; i < BMP_LOGO_WIDTH; i++) in rotate_logo_one()
338 out[j * BMP_LOGO_WIDTH + BMP_LOGO_HEIGHT - 1 - i] = in rotate_logo_one()
339 in[i * BMP_LOGO_WIDTH + j]; in rotate_logo_one()
352 int i, j; in rotate_logo() local
373 for (i = 0; i < BMP_LOGO_WIDTH; i++) in rotate_logo()
375 in_logo[i * BMP_LOGO_WIDTH + j] = in rotate_logo()
[all …]
/rk3399_rockchip-uboot/drivers/crypto/rockchip/
H A Dcrypto_ce.c150 u32 i, j; in rk_get_cemode() local
170 for (i = 0; i < ARRAY_SIZE(map_tbl); i++) { in rk_get_cemode()
171 const struct rockchip_map *map = map_tbl[i].map; in rk_get_cemode()
172 u32 num = map_tbl[i].num; in rk_get_cemode()
186 u32 i; in rk_load_map() local
189 for (i = 0; i < num; i++) { in rk_load_map()
190 if (rkce_hw_algo_valid(priv->hardware, algo_type, map[i].rkce, 0)) in rk_load_map()
191 capability |= map[i].crypto; in rk_load_map()
467 u32 i = 0; in hw_get_ccm_aad_padding() local
475 i = 2; in hw_get_ccm_aad_padding()
[all …]
/rk3399_rockchip-uboot/arch/powerpc/include/asm/
H A Datomic.h14 #define ATOMIC_INIT(i) { (i) } argument
17 #define atomic_set(v,i) (((v)->counter) = (i)) argument
/rk3399_rockchip-uboot/lib/libxbc/
H A Dlibxbc.c35 for (uint32_t i = 0; i < size; i++) { in checksum() local
36 sum += buffer[i]; in checksum()
/rk3399_rockchip-uboot/drivers/clk/renesas/
H A Dclk-rcar-gen3.c47 #define MSTPSR(i) mstpsr[i] argument
59 #define SMSTPCR(i) smstpcr[i] argument
63 #define RMSTPCR(i) (smstpcr[i] - 0x20) argument
66 #define MMSTPCR(i) (smstpcr[i] + 0x20) argument
69 #define SRSTCLR(i) (0x940 + (i) * 4) argument
691 int i; in gen3_clk_get_mod() local
696 for (i = 0; i < priv->mod_clk_size; i++) { in gen3_clk_get_mod()
697 if (priv->mod_clk[i].id != MOD_CLK_ID(clkid)) in gen3_clk_get_mod()
700 *mssr = &priv->mod_clk[i]; in gen3_clk_get_mod()
711 int i; in gen3_clk_get_core() local
[all …]
/rk3399_rockchip-uboot/board/keymile/kmp204x/
H A Dqrio.c133 u8 i; in qrio_prstcfg() local
138 for (i = 0; i < 2; i++) { in qrio_prstcfg()
139 if (mode & (1<<i)) in qrio_prstcfg()
140 set_bit(2*bit+i, &prstcfg); in qrio_prstcfg()
142 clear_bit(2*bit+i, &prstcfg); in qrio_prstcfg()
/rk3399_rockchip-uboot/drivers/ddr/fsl/
H A Dddr1_dimm_params.c194 unsigned int i; in compute_derated_DDR1_CAS_latency() local
198 for (i = 0; i < num_speed_bins; i++) { in compute_derated_DDR1_CAS_latency()
199 unsigned int x = ddr1_speed_bins[i]; in compute_derated_DDR1_CAS_latency()
201 i, x, lowest_tCKmin_found); in compute_derated_DDR1_CAS_latency()
204 lowest_tCKmin_CL = i + 1; in compute_derated_DDR1_CAS_latency()
H A Dddr3_dimm_params.c92 int i; in ddr_compute_dimm_parameters() local
141 for (i = 0; i < 16; i += 2) { in ddr_compute_dimm_parameters()
142 u8 rcw = spd->mod_section.registered.rcw[i/2]; in ddr_compute_dimm_parameters()
143 pdimm->rcw[i] = (rcw >> 0) & 0x0F; in ddr_compute_dimm_parameters()
144 pdimm->rcw[i+1] = (rcw >> 4) & 0x0F; in ddr_compute_dimm_parameters()
/rk3399_rockchip-uboot/arch/arm/cpu/pxa/
H A Dpxa2xx.c22 unsigned long i = 0; in cache_flush() local
24 asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (i)); in cache_flush()
61 int i; in pxa2xx_dram_init() local
150 for (i = 9; i >= 0; i--) { in pxa2xx_dram_init()
151 writel(i, 0xa0000000); in pxa2xx_dram_init()
/rk3399_rockchip-uboot/common/
H A Dcli_simple.c123 int i; in cli_simple_process_macros() local
129 for (i = 0; i < envcnt; i++) in cli_simple_process_macros()
130 envname[i] = varname_start[i]; in cli_simple_process_macros()
131 envname[i] = 0; in cli_simple_process_macros()

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