Searched hist:efc945f1a8c19a678737dd07734e57375f0f830c (Results 1 – 9 of 9) sorted by relevance
| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | dsu_macros.S | efc945f1a8c19a678737dd07734e57375f0f830c Mon May 05 21:18:14 UTC 2025 Arvind Ram Prakash <arvind.ramprakash@arm.com> feat(errata): implement workaround for DSU-120 erratum 2900952
DSU Erratum 2900952 is a Cat B erratum that applies to some
DSU-120 implementations of revision r2p0 and is fixed in r2p1.
This erratum is fixed in certain implementations of r2p0 which can be
determined by reading the IMP_CLUSTERREVIDR_EL1[1] register field
where a set bit indicates that the erratum is fixed in this part.
The workaround is to set the CLUSTERACTLR_EL1 bits [21:20] to 0x3
which ignores CBusy from the system interconnect and
setting CLUSTERACTLR_EL1 bit [8] to 1 to assert CBusy from DSU to
all the cores when DSU is busy.
SDEN: https://developer.arm.com/documentation/SDEN-2453103/1200/?lang=en
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I87aa440ab5c35121aff703032f5cf7a62d0b0bb4
|
| H A D | dsu_def.h | efc945f1a8c19a678737dd07734e57375f0f830c Mon May 05 21:18:14 UTC 2025 Arvind Ram Prakash <arvind.ramprakash@arm.com> feat(errata): implement workaround for DSU-120 erratum 2900952
DSU Erratum 2900952 is a Cat B erratum that applies to some
DSU-120 implementations of revision r2p0 and is fixed in r2p1.
This erratum is fixed in certain implementations of r2p0 which can be
determined by reading the IMP_CLUSTERREVIDR_EL1[1] register field
where a set bit indicates that the erratum is fixed in this part.
The workaround is to set the CLUSTERACTLR_EL1 bits [21:20] to 0x3
which ignores CBusy from the system interconnect and
setting CLUSTERACTLR_EL1 bit [8] to 1 to assert CBusy from DSU to
all the cores when DSU is busy.
SDEN: https://developer.arm.com/documentation/SDEN-2453103/1200/?lang=en
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I87aa440ab5c35121aff703032f5cf7a62d0b0bb4
|
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_a725.S | efc945f1a8c19a678737dd07734e57375f0f830c Mon May 05 21:18:14 UTC 2025 Arvind Ram Prakash <arvind.ramprakash@arm.com> feat(errata): implement workaround for DSU-120 erratum 2900952
DSU Erratum 2900952 is a Cat B erratum that applies to some
DSU-120 implementations of revision r2p0 and is fixed in r2p1.
This erratum is fixed in certain implementations of r2p0 which can be
determined by reading the IMP_CLUSTERREVIDR_EL1[1] register field
where a set bit indicates that the erratum is fixed in this part.
The workaround is to set the CLUSTERACTLR_EL1 bits [21:20] to 0x3
which ignores CBusy from the system interconnect and
setting CLUSTERACTLR_EL1 bit [8] to 1 to assert CBusy from DSU to
all the cores when DSU is busy.
SDEN: https://developer.arm.com/documentation/SDEN-2453103/1200/?lang=en
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I87aa440ab5c35121aff703032f5cf7a62d0b0bb4
|
| H A D | cortex_a520.S | efc945f1a8c19a678737dd07734e57375f0f830c Mon May 05 21:18:14 UTC 2025 Arvind Ram Prakash <arvind.ramprakash@arm.com> feat(errata): implement workaround for DSU-120 erratum 2900952
DSU Erratum 2900952 is a Cat B erratum that applies to some
DSU-120 implementations of revision r2p0 and is fixed in r2p1.
This erratum is fixed in certain implementations of r2p0 which can be
determined by reading the IMP_CLUSTERREVIDR_EL1[1] register field
where a set bit indicates that the erratum is fixed in this part.
The workaround is to set the CLUSTERACTLR_EL1 bits [21:20] to 0x3
which ignores CBusy from the system interconnect and
setting CLUSTERACTLR_EL1 bit [8] to 1 to assert CBusy from DSU to
all the cores when DSU is busy.
SDEN: https://developer.arm.com/documentation/SDEN-2453103/1200/?lang=en
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I87aa440ab5c35121aff703032f5cf7a62d0b0bb4
|
| H A D | cortex_x925.S | efc945f1a8c19a678737dd07734e57375f0f830c Mon May 05 21:18:14 UTC 2025 Arvind Ram Prakash <arvind.ramprakash@arm.com> feat(errata): implement workaround for DSU-120 erratum 2900952
DSU Erratum 2900952 is a Cat B erratum that applies to some
DSU-120 implementations of revision r2p0 and is fixed in r2p1.
This erratum is fixed in certain implementations of r2p0 which can be
determined by reading the IMP_CLUSTERREVIDR_EL1[1] register field
where a set bit indicates that the erratum is fixed in this part.
The workaround is to set the CLUSTERACTLR_EL1 bits [21:20] to 0x3
which ignores CBusy from the system interconnect and
setting CLUSTERACTLR_EL1 bit [8] to 1 to assert CBusy from DSU to
all the cores when DSU is busy.
SDEN: https://developer.arm.com/documentation/SDEN-2453103/1200/?lang=en
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I87aa440ab5c35121aff703032f5cf7a62d0b0bb4
|
| H A D | cortex_a720.S | efc945f1a8c19a678737dd07734e57375f0f830c Mon May 05 21:18:14 UTC 2025 Arvind Ram Prakash <arvind.ramprakash@arm.com> feat(errata): implement workaround for DSU-120 erratum 2900952
DSU Erratum 2900952 is a Cat B erratum that applies to some
DSU-120 implementations of revision r2p0 and is fixed in r2p1.
This erratum is fixed in certain implementations of r2p0 which can be
determined by reading the IMP_CLUSTERREVIDR_EL1[1] register field
where a set bit indicates that the erratum is fixed in this part.
The workaround is to set the CLUSTERACTLR_EL1 bits [21:20] to 0x3
which ignores CBusy from the system interconnect and
setting CLUSTERACTLR_EL1 bit [8] to 1 to assert CBusy from DSU to
all the cores when DSU is busy.
SDEN: https://developer.arm.com/documentation/SDEN-2453103/1200/?lang=en
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I87aa440ab5c35121aff703032f5cf7a62d0b0bb4
|
| H A D | cortex_x4.S | efc945f1a8c19a678737dd07734e57375f0f830c Mon May 05 21:18:14 UTC 2025 Arvind Ram Prakash <arvind.ramprakash@arm.com> feat(errata): implement workaround for DSU-120 erratum 2900952
DSU Erratum 2900952 is a Cat B erratum that applies to some
DSU-120 implementations of revision r2p0 and is fixed in r2p1.
This erratum is fixed in certain implementations of r2p0 which can be
determined by reading the IMP_CLUSTERREVIDR_EL1[1] register field
where a set bit indicates that the erratum is fixed in this part.
The workaround is to set the CLUSTERACTLR_EL1 bits [21:20] to 0x3
which ignores CBusy from the system interconnect and
setting CLUSTERACTLR_EL1 bit [8] to 1 to assert CBusy from DSU to
all the cores when DSU is busy.
SDEN: https://developer.arm.com/documentation/SDEN-2453103/1200/?lang=en
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I87aa440ab5c35121aff703032f5cf7a62d0b0bb4
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | efc945f1a8c19a678737dd07734e57375f0f830c Mon May 05 21:18:14 UTC 2025 Arvind Ram Prakash <arvind.ramprakash@arm.com> feat(errata): implement workaround for DSU-120 erratum 2900952
DSU Erratum 2900952 is a Cat B erratum that applies to some
DSU-120 implementations of revision r2p0 and is fixed in r2p1.
This erratum is fixed in certain implementations of r2p0 which can be
determined by reading the IMP_CLUSTERREVIDR_EL1[1] register field
where a set bit indicates that the erratum is fixed in this part.
The workaround is to set the CLUSTERACTLR_EL1 bits [21:20] to 0x3
which ignores CBusy from the system interconnect and
setting CLUSTERACTLR_EL1 bit [8] to 1 to assert CBusy from DSU to
all the cores when DSU is busy.
SDEN: https://developer.arm.com/documentation/SDEN-2453103/1200/?lang=en
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I87aa440ab5c35121aff703032f5cf7a62d0b0bb4
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | efc945f1a8c19a678737dd07734e57375f0f830c Mon May 05 21:18:14 UTC 2025 Arvind Ram Prakash <arvind.ramprakash@arm.com> feat(errata): implement workaround for DSU-120 erratum 2900952
DSU Erratum 2900952 is a Cat B erratum that applies to some
DSU-120 implementations of revision r2p0 and is fixed in r2p1.
This erratum is fixed in certain implementations of r2p0 which can be
determined by reading the IMP_CLUSTERREVIDR_EL1[1] register field
where a set bit indicates that the erratum is fixed in this part.
The workaround is to set the CLUSTERACTLR_EL1 bits [21:20] to 0x3
which ignores CBusy from the system interconnect and
setting CLUSTERACTLR_EL1 bit [8] to 1 to assert CBusy from DSU to
all the cores when DSU is busy.
SDEN: https://developer.arm.com/documentation/SDEN-2453103/1200/?lang=en
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I87aa440ab5c35121aff703032f5cf7a62d0b0bb4
|