Searched hist:ce21a1a909f2ec98f83c25dd2ed3b7fedd46c46b (Results 1 – 8 of 8) sorted by relevance
| /rk3399_ARM-atf/plat/intel/soc/agilex5/include/ |
| H A D | agilex5_ddr.h | ce21a1a909f2ec98f83c25dd2ed3b7fedd46c46b Mon Aug 26 14:51:16 UTC 2024 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): update Agilex5 DDR and IOSSM driver
DDR and IOSSM driver code for Agilex5 platform,
initialize the DDR/IOSSM in BL2 EL3 early flow.
Change-Id: I3e4205171d9356190b60498cae322318520bb1c2
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
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| H A D | agilex5_iossm_mailbox.h | ce21a1a909f2ec98f83c25dd2ed3b7fedd46c46b Mon Aug 26 14:51:16 UTC 2024 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): update Agilex5 DDR and IOSSM driver
DDR and IOSSM driver code for Agilex5 platform,
initialize the DDR/IOSSM in BL2 EL3 early flow.
Change-Id: I3e4205171d9356190b60498cae322318520bb1c2
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
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| /rk3399_ARM-atf/plat/intel/soc/agilex5/soc/ |
| H A D | agilex5_iossm_mailbox.c | ce21a1a909f2ec98f83c25dd2ed3b7fedd46c46b Mon Aug 26 14:51:16 UTC 2024 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): update Agilex5 DDR and IOSSM driver
DDR and IOSSM driver code for Agilex5 platform,
initialize the DDR/IOSSM in BL2 EL3 early flow.
Change-Id: I3e4205171d9356190b60498cae322318520bb1c2
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
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| H A D | agilex5_ddr.c | ce21a1a909f2ec98f83c25dd2ed3b7fedd46c46b Mon Aug 26 14:51:16 UTC 2024 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): update Agilex5 DDR and IOSSM driver
DDR and IOSSM driver code for Agilex5 platform,
initialize the DDR/IOSSM in BL2 EL3 early flow.
Change-Id: I3e4205171d9356190b60498cae322318520bb1c2
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
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| /rk3399_ARM-atf/plat/intel/soc/common/include/ |
| H A D | socfpga_handoff.h | ce21a1a909f2ec98f83c25dd2ed3b7fedd46c46b Mon Aug 26 14:51:16 UTC 2024 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): update Agilex5 DDR and IOSSM driver
DDR and IOSSM driver code for Agilex5 platform,
initialize the DDR/IOSSM in BL2 EL3 early flow.
Change-Id: I3e4205171d9356190b60498cae322318520bb1c2
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
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| /rk3399_ARM-atf/plat/intel/soc/agilex5/ |
| H A D | platform.mk | ce21a1a909f2ec98f83c25dd2ed3b7fedd46c46b Mon Aug 26 14:51:16 UTC 2024 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): update Agilex5 DDR and IOSSM driver
DDR and IOSSM driver code for Agilex5 platform,
initialize the DDR/IOSSM in BL2 EL3 early flow.
Change-Id: I3e4205171d9356190b60498cae322318520bb1c2
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
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| H A D | bl2_plat_setup.c | ce21a1a909f2ec98f83c25dd2ed3b7fedd46c46b Mon Aug 26 14:51:16 UTC 2024 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): update Agilex5 DDR and IOSSM driver
DDR and IOSSM driver code for Agilex5 platform,
initialize the DDR/IOSSM in BL2 EL3 early flow.
Change-Id: I3e4205171d9356190b60498cae322318520bb1c2
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
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| /rk3399_ARM-atf/plat/intel/soc/agilex/include/ |
| H A D | socfpga_plat_def.h | ce21a1a909f2ec98f83c25dd2ed3b7fedd46c46b Mon Aug 26 14:51:16 UTC 2024 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): update Agilex5 DDR and IOSSM driver
DDR and IOSSM driver code for Agilex5 platform,
initialize the DDR/IOSSM in BL2 EL3 early flow.
Change-Id: I3e4205171d9356190b60498cae322318520bb1c2
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
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