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/rk3399_ARM-atf/plat/intel/soc/n5x/
H A Dplatform.mk8e53b2fa2eef44457ae1b50cd116e13d67df35f8 Fri Jul 01 01:08:57 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> fix(intel): fix UART baud rate and clock

Revise the UART baud rate and clock for general platform build,
SIMIC build and EMU build.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I62fefe7b96d5124e75d2810b4fbc1640422b1353
/rk3399_ARM-atf/plat/intel/soc/common/include/
H A Dplatform_def.h8e53b2fa2eef44457ae1b50cd116e13d67df35f8 Fri Jul 01 01:08:57 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> fix(intel): fix UART baud rate and clock

Revise the UART baud rate and clock for general platform build,
SIMIC build and EMU build.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I62fefe7b96d5124e75d2810b4fbc1640422b1353
/rk3399_ARM-atf/plat/intel/soc/stratix10/
H A Dplatform.mk8e53b2fa2eef44457ae1b50cd116e13d67df35f8 Fri Jul 01 01:08:57 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> fix(intel): fix UART baud rate and clock

Revise the UART baud rate and clock for general platform build,
SIMIC build and EMU build.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I62fefe7b96d5124e75d2810b4fbc1640422b1353
/rk3399_ARM-atf/plat/intel/soc/agilex/
H A Dplatform.mk8e53b2fa2eef44457ae1b50cd116e13d67df35f8 Fri Jul 01 01:08:57 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> fix(intel): fix UART baud rate and clock

Revise the UART baud rate and clock for general platform build,
SIMIC build and EMU build.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I62fefe7b96d5124e75d2810b4fbc1640422b1353